From: "Christian König" <ckoenig.leichtzumerken@gmail.com>
To: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
devspam@moreofthesa.me.uk, Linux PCI <linux-pci@vger.kernel.org>,
dri-devel <dri-devel@lists.freedesktop.org>,
amd-gfx mailing list <amd-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 4/4] PCI: add a REBAR size quirk for Sapphire RX 5600 XT Pulse.
Date: Tue, 5 Jan 2021 18:43:53 +0100 [thread overview]
Message-ID: <21a04206-c198-f358-d7ca-b0f04f5b7a2f@gmail.com> (raw)
In-Reply-To: <CAKb7UvhUXKTVp9bXmbkU4VR8WQVZ16LNvk8QKkqiOUTKC8DVQg@mail.gmail.com>
Am 05.01.21 um 17:11 schrieb Ilia Mirkin:
> On Tue, Jan 5, 2021 at 8:44 AM Christian König
> <ckoenig.leichtzumerken@gmail.com> wrote:
>> Otherwise the CPU can't fully access the BAR.
>>
>> Signed-off-by: Christian König <christian.koenig@amd.com>
>> ---
>> drivers/pci/pci.c | 9 ++++++++-
>> 1 file changed, 8 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
>> index 16216186b51c..b66e4703c214 100644
>> --- a/drivers/pci/pci.c
>> +++ b/drivers/pci/pci.c
>> @@ -3577,7 +3577,14 @@ u32 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar)
>> return 0;
>>
>> pci_read_config_dword(pdev, pos + PCI_REBAR_CAP, &cap);
>> - return (cap & PCI_REBAR_CAP_SIZES) >> 4;
>> + cap = (cap & PCI_REBAR_CAP_SIZES) >> 4;
>> +
>> + /* Sapphire RX 5600 XT Pulse has an invalid cap dword for BAR 0 */
>> + if (pdev->vendor == PCI_VENDOR_ID_ATI && pdev->device == 0x731f &&
>> + bar == 0 && cap == 0x700)
>> + cap == 0x7f00;
> Perhaps you meant cap = 0x7f00?
Ups, indeed! Thanks for pointing that out.
Christian.
>
>> +
>> + return cap;
>> }
>> EXPORT_SYMBOL(pci_rebar_get_possible_sizes);
>>
>> --
>> 2.25.1
>>
>> _______________________________________________
>> dri-devel mailing list
>> dri-devel@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2021-01-05 17:44 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-05 13:44 A PCI quirk for resizeable BAR 0 on Navi10 Christian König
2021-01-05 13:44 ` [PATCH 1/4] pci: export pci_rebar_get_possible_sizes Christian König
2021-01-09 9:25 ` Christoph Hellwig
2021-01-05 13:44 ` [PATCH 2/4] pci: add BAR bytes->size helper & expose size->bytes helper v2 Christian König
2021-01-05 13:44 ` [PATCH 3/4] amdgpu: resize BAR0 to the maximum available size, even if it doesn't cover VRAM (v6) Christian König
2021-01-05 13:44 ` [PATCH 4/4] PCI: add a REBAR size quirk for Sapphire RX 5600 XT Pulse Christian König
2021-01-05 16:11 ` Ilia Mirkin
2021-01-05 17:43 ` Christian König [this message]
2021-01-05 17:28 ` kernel test robot
2021-01-05 18:41 ` [kbuild] " Dan Carpenter
2021-01-05 21:42 ` A PCI quirk for resizeable BAR 0 on Navi10 Bjorn Helgaas
-- strict thread matches above, loose matches on Subject: below --
2021-01-07 17:50 [PATCH 0/4] A PCI quirk for resizable " Nirmoy Das
2021-01-07 17:50 ` [PATCH 4/4] PCI: Add a REBAR size quirk for Sapphire RX 5600 XT Pulse Nirmoy Das
2021-01-07 21:32 ` Bjorn Helgaas
2021-01-07 20:25 ` Christian König
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