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From: Kuppuswamy Sathyanarayanan  <sathyanarayanan.kuppuswamy@linux.intel.com>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	ashok.raj@intel.com, keith.busch@intel.com
Subject: Re: [PATCH v9 7/8] PCI/DPC: Clear AER registers in EDR mode
Date: Tue, 29 Oct 2019 13:04:29 -0700	[thread overview]
Message-ID: <283cbbb4-78b7-7773-5613-d77341af166b@linux.intel.com> (raw)
In-Reply-To: <20191028232732.GA206631@google.com>


On 10/28/19 4:27 PM, Bjorn Helgaas wrote:
> On Thu, Oct 03, 2019 at 04:39:03PM -0700, sathyanarayanan.kuppuswamy@linux.intel.com wrote:
>> From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
>>
>> As per PCI firmware specification r3.2 Downstream Port Containment
>> Related Enhancements ECN,
> Specific reference, please, e.g., the section/table/figure of the PCI
> Firmware Spec being modified by the ECN.
Ok. I will include it.
>
>> OS is responsible for clearing the AER
>> registers in EDR mode. So clear AER registers in dpc_process_error()
>> function.
>>
>> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
>> Acked-by: Keith Busch <keith.busch@intel.com>
>> ---
>>   drivers/pci/pcie/dpc.c | 4 ++++
>>   1 file changed, 4 insertions(+)
>>
>> diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c
>> index fafc55c00fe0..de2d892bc7c4 100644
>> --- a/drivers/pci/pcie/dpc.c
>> +++ b/drivers/pci/pcie/dpc.c
>> @@ -275,6 +275,10 @@ static void dpc_process_error(struct dpc_dev *dpc)
>>   		pci_aer_clear_fatal_status(pdev);
>>   	}
>>   
>> +	/* In EDR mode, OS is responsible for clearing AER registers */
>> +	if (dpc->firmware_dpc)
> I guess "EDR mode" is effectively the same as "firmware-first mode"?
Yes, EDR mode is an upgrade to FF mode in which firmware allows
OS to share some of it job by sending ACPI notification. If you don't get
ACPI notification, EDR mode is effectively same as FF mode.
>
> At least, the only place we set "firmware_dpc = 1" is:
>
>    +       if (pcie_aer_get_firmware_first(pdev))
>    +               dpc->firmware_dpc = 1;
>
> If they're the same, why do we need two different names for it?
For better readability and performance, I tried to cache the value of
pcie_aer_get_firmware_first() result in DPC driver.
>
>> +		pci_cleanup_aer_error_status_regs(pdev);
>> +
>>   	/*
>>   	 * Irrespective of whether the DPC event is triggered by
>>   	 * ERR_FATAL or ERR_NONFATAL, since the link is already down,
>> -- 
>> 2.21.0
>>
-- 
Sathyanarayanan Kuppuswamy
Linux kernel developer


  reply	other threads:[~2019-10-29 20:06 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-03 23:38 [PATCH v9 0/8] Add Error Disconnect Recover (EDR) support sathyanarayanan.kuppuswamy
2019-10-03 23:38 ` [PATCH v9 1/8] PCI/ERR: Update error status after reset_link() sathyanarayanan.kuppuswamy
2019-10-03 23:38 ` [PATCH v9 2/8] PCI/DPC: Allow dpc_probe() even if firmware first mode is enabled sathyanarayanan.kuppuswamy
2019-10-03 23:38 ` [PATCH v9 3/8] PCI/DPC: Add dpc_process_error() wrapper function sathyanarayanan.kuppuswamy
2019-10-03 23:39 ` [PATCH v9 4/8] PCI/DPC: Add Error Disconnect Recover (EDR) support sathyanarayanan.kuppuswamy
2019-10-03 23:39 ` [PATCH v9 5/8] PCI/AER: Allow clearing Error Status Register in FF mode sathyanarayanan.kuppuswamy
2019-10-28 23:22   ` Bjorn Helgaas
2019-10-29 19:58     ` Kuppuswamy Sathyanarayanan
2019-10-29 23:03       ` Bjorn Helgaas
2019-10-29 23:17         ` Kuppuswamy Sathyanarayanan
2019-10-03 23:39 ` [PATCH v9 6/8] PCI/DPC: Update comments related to DPC recovery on NON_FATAL errors sathyanarayanan.kuppuswamy
2019-10-03 23:39 ` [PATCH v9 7/8] PCI/DPC: Clear AER registers in EDR mode sathyanarayanan.kuppuswamy
2019-10-28 23:27   ` Bjorn Helgaas
2019-10-29 20:04     ` Kuppuswamy Sathyanarayanan [this message]
2019-10-29 22:48       ` Bjorn Helgaas
2019-10-29 23:37         ` Kuppuswamy Sathyanarayanan
2019-10-03 23:39 ` [PATCH v9 8/8] PCI/ACPI: Enable EDR support sathyanarayanan.kuppuswamy

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