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mx.microsoft.com 1; spf=pass smtp.mailfrom=suse.com; dmarc=pass action=none header.from=suse.com; dkim=pass header.d=suse.com; arc=none Authentication-Results: lists.infradead.org; dkim=none (message not signed) header.d=none;lists.infradead.org; dmarc=none action=none header.from=suse.com; Received: from PA4PR04MB7533.eurprd04.prod.outlook.com (2603:10a6:102:f1::19) by PR3PR04MB7242.eurprd04.prod.outlook.com (2603:10a6:102:91::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3477.25; Sat, 7 Nov 2020 11:57:32 +0000 Received: from PA4PR04MB7533.eurprd04.prod.outlook.com ([fe80::545:8a04:2a5c:f4c7]) by PA4PR04MB7533.eurprd04.prod.outlook.com ([fe80::545:8a04:2a5c:f4c7%6]) with mapi id 15.20.3541.022; Sat, 7 Nov 2020 11:57:32 +0000 Subject: Re: [PATCH 1/2] PCI: rockchip: Make some regulators non-optional From: Qu Wenruo To: Lorenzo Pieralisi , Robin Murphy CC: heiko@sntech.de, linux-pci@vger.kernel.org, shawn.lin@rock-chips.com, lgirdwood@gmail.com, linux-rockchip@lists.infradead.org, broonie@kernel.org, bhelgaas@google.com, andrew.murray@arm.com, linux-arm-kernel@lists.infradead.org References: <1eebc002101931012d337cda23d18f85b0326361.1573908530.git.robin.murphy@arm.com> <20191120170532.GC3279@e121166-lin.cambridge.arm.com> Autocrypt: addr=wqu@suse.com; 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Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.12.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: quoted-printable X-Originating-IP: [149.28.201.231] X-ClientProxiedBy: BYAPR01CA0063.prod.exchangelabs.com (2603:10b6:a03:94::40) To PA4PR04MB7533.eurprd04.prod.outlook.com (2603:10a6:102:f1::19) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from [0.0.0.0] (149.28.201.231) by BYAPR01CA0063.prod.exchangelabs.com (2603:10b6:a03:94::40) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3499.27 via Frontend Transport; Sat, 7 Nov 2020 11:57:26 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: cd4bd156-a968-4c0f-00e3-08d883144ee2 X-MS-TrafficTypeDiagnostic: PR3PR04MB7242: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:9508; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: faB62e8UgJCMudvElap6f7UaXm9Uxmvif+MLvCiFYtupHkXOeDEXyIkBLV4EW96jq6F5GzwwDMp7oqH0NO2w6T/guHJEczcDykiYxKqt9503O1qXle5YU5LRNjGlxfPxY8caBHMGLGsSd1+iaQ+LqpR9M3OqBTh4ibQDkEJpVTu/TJlkT8GXyxpBqp5BVhrSRXdhDgQbPxHrCu0JY8wNVlvCTlq7Hby67t85XRNZ7W98Atz/IiD8uhHT79kakydQ8lx1Gj35ddwhou7zf9xTlPVIRbiedoDGbZcV0qs3ojewKagvtPKN/tUN8hap8QdUvJ7Rs3AjsP5q+bNd9er6IQG8C9L+PHXqULjiNHJF0NRC9wsb0UWypYtU+/eIjeLsVTNV3sJLbJpjG9HF1wnDLOB56VmjuglrACDc6hid6xbPeibEuPKGT1NMnQWMolsRBrZ3nxxAHGVbJ9FeiqPG8Zl5B2PIVb6u/hTVG2IGZVo= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:PA4PR04MB7533.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(366004)(376002)(346002)(136003)(39860400002)(396003)(956004)(86362001)(83380400001)(6666004)(52116002)(6706004)(966005)(4326008)(5660300002)(7416002)(31686004)(2906002)(316002)(2616005)(6486002)(186003)(66946007)(8676002)(66556008)(31696002)(66476007)(8936002)(16576012)(36756003)(110136005)(16526019)(26005)(478600001)(78286007)(43740500002);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData: wgkSOawnKt/J/LGybptAEZkwJctDxMDu5osSIJOYGIpN9OCWsD9BBFXsjwkDdOkMkwCflJvmlQsHHDUWlSkk3S15PlxJjQktYiAsMcvxX8OMt+y5AEXgVmYE3NV0VNcZg9ZwN5VU5rwT0nRymODyUBkZHRZ8QS7U5tHZ1vE6mZUPZCOUYO1TfNsfEKOIOSUK7ti8UqLRTcGTj3TyIDVofMroBcL6bKQ66BfZM1hpGcsBWL8VlRQOfOOsyo1mn81+Wl409yh9TvLohCC+z+L501y8ay/A9Vpp79V0IG84T9+9hOmPnDD5N5PQ9jL54xxF7zOzQylAqunHWU8RV8pK5JL57wCuKBWa7E0hL83JVRgyIeem4vypqy5DX/RBL0dmyCjySI/olJQkp+zP3MVYRCHh7fzbElZ38aAbxSooXCBk5OO2nRGNNCCy+xeaZNuaac/hVM8T529RNguZkMZmxU4MExtf+Kik0NyLGi3n/G5UXm9vWF4IAW4gywfqGWhrdeYx9eTap7p4GIPO8dDIbuNopwW3tjV8lFWBzfnrJ9XruD+5uVLvdf8h4lhlujgy/hLaPXmp3CMZdKUNtUuxdevqXaLO+VYcyckUiD3uB0JrY2xq3qbykOkfBpTyuF7EHAdYJKrdPGkIRH+8BvdAEA== X-OriginatorOrg: suse.com X-MS-Exchange-CrossTenant-Network-Message-Id: cd4bd156-a968-4c0f-00e3-08d883144ee2 X-MS-Exchange-CrossTenant-AuthSource: PA4PR04MB7533.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Nov 2020 11:57:32.1442 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: f7a17af6-1c5c-4a36-aa8b-f5be247aa4ba X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 5eQdWZLpSlxVVksGCq2NOYjL5MEWk1PbUevRKS1l8eNT2UyIiPuqjlvARQmCf6Ki X-MS-Exchange-Transport-CrossTenantHeadersStamped: PR3PR04MB7242 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On 2020/11/7 =E4=B8=8B=E5=8D=887:36, Qu Wenruo wrote: >=20 >=20 > On 2019/11/21 =E4=B8=8A=E5=8D=881:05, Lorenzo Pieralisi wrote: >> On Sat, Nov 16, 2019 at 12:54:19PM +0000, Robin Murphy wrote: >>> The 0V9 and 1V8 supplies power the PCIe block in the SoC itself, and >>> are thus fundamental to PCIe being usable at all. As such, it makes >>> sense to treat them as non-optional and rely on dummy regulators if >>> not explicitly described. >>> >>> Signed-off-by: Robin Murphy >>> --- >>> drivers/pci/controller/pcie-rockchip-host.c | 69 ++++++++------------- >>> 1 file changed, 25 insertions(+), 44 deletions(-) >> >> Applied to pci/rockchip, thanks. >=20 > Sorry, this commit is cause regression for RK3399 boards unable to > detect the controller anymore. >=20 > The 1v8 (and 0v9) is causing -517 and reject the controller initializatio= n. >=20 > I'm not a PCI guy, but a quick google search shows these two voltages > are not related to PCIE core functionality, especially considering the > controller used in RK3399 are mostly to provide NVME support. >=20 > This bug makes all RK3399 users who put root fs into NVME driver unable > to boot the device. >=20 > I really hope some one could test the patch before affecting the end > users or at least try to understand how most users would use the PCIE > interface for. My bad, it's not that easy. The dtsi has vpcie1v8 and vpcie0v9 defined. It should be something else wrong. Thanks, Qu >=20 > Thanks, > Qu >=20 >> >> Lorenzo >> >>> diff --git a/drivers/pci/controller/pcie-rockchip-host.c b/drivers/pci/= controller/pcie-rockchip-host.c >>> index ef8e677ce9d1..68525f8ac4d9 100644 >>> --- a/drivers/pci/controller/pcie-rockchip-host.c >>> +++ b/drivers/pci/controller/pcie-rockchip-host.c >>> @@ -620,19 +620,13 @@ static int rockchip_pcie_parse_host_dt(struct roc= kchip_pcie *rockchip) >>> dev_info(dev, "no vpcie3v3 regulator found\n"); >>> } >>> =20 >>> - rockchip->vpcie1v8 =3D devm_regulator_get_optional(dev, "vpcie1v8"); >>> - if (IS_ERR(rockchip->vpcie1v8)) { >>> - if (PTR_ERR(rockchip->vpcie1v8) !=3D -ENODEV) >>> - return PTR_ERR(rockchip->vpcie1v8); >>> - dev_info(dev, "no vpcie1v8 regulator found\n"); >>> - } >>> + rockchip->vpcie1v8 =3D devm_regulator_get(dev, "vpcie1v8"); >>> + if (IS_ERR(rockchip->vpcie1v8)) >>> + return PTR_ERR(rockchip->vpcie1v8); >>> =20 >>> - rockchip->vpcie0v9 =3D devm_regulator_get_optional(dev, "vpcie0v9"); >>> - if (IS_ERR(rockchip->vpcie0v9)) { >>> - if (PTR_ERR(rockchip->vpcie0v9) !=3D -ENODEV) >>> - return PTR_ERR(rockchip->vpcie0v9); >>> - dev_info(dev, "no vpcie0v9 regulator found\n"); >>> - } >>> + rockchip->vpcie0v9 =3D devm_regulator_get(dev, "vpcie0v9"); >>> + if (IS_ERR(rockchip->vpcie0v9)) >>> + return PTR_ERR(rockchip->vpcie0v9); >>> =20 >>> return 0; >>> } >>> @@ -658,27 +652,22 @@ static int rockchip_pcie_set_vpcie(struct rockchi= p_pcie *rockchip) >>> } >>> } >>> =20 >>> - if (!IS_ERR(rockchip->vpcie1v8)) { >>> - err =3D regulator_enable(rockchip->vpcie1v8); >>> - if (err) { >>> - dev_err(dev, "fail to enable vpcie1v8 regulator\n"); >>> - goto err_disable_3v3; >>> - } >>> + err =3D regulator_enable(rockchip->vpcie1v8); >>> + if (err) { >>> + dev_err(dev, "fail to enable vpcie1v8 regulator\n"); >>> + goto err_disable_3v3; >>> } >>> =20 >>> - if (!IS_ERR(rockchip->vpcie0v9)) { >>> - err =3D regulator_enable(rockchip->vpcie0v9); >>> - if (err) { >>> - dev_err(dev, "fail to enable vpcie0v9 regulator\n"); >>> - goto err_disable_1v8; >>> - } >>> + err =3D regulator_enable(rockchip->vpcie0v9); >>> + if (err) { >>> + dev_err(dev, "fail to enable vpcie0v9 regulator\n"); >>> + goto err_disable_1v8; >>> } >>> =20 >>> return 0; >>> =20 >>> err_disable_1v8: >>> - if (!IS_ERR(rockchip->vpcie1v8)) >>> - regulator_disable(rockchip->vpcie1v8); >>> + regulator_disable(rockchip->vpcie1v8); >>> err_disable_3v3: >>> if (!IS_ERR(rockchip->vpcie3v3)) >>> regulator_disable(rockchip->vpcie3v3); >>> @@ -897,8 +886,7 @@ static int __maybe_unused rockchip_pcie_suspend_noi= rq(struct device *dev) >>> =20 >>> rockchip_pcie_disable_clocks(rockchip); >>> =20 >>> - if (!IS_ERR(rockchip->vpcie0v9)) >>> - regulator_disable(rockchip->vpcie0v9); >>> + regulator_disable(rockchip->vpcie0v9); >>> =20 >>> return ret; >>> } >>> @@ -908,12 +896,10 @@ static int __maybe_unused rockchip_pcie_resume_no= irq(struct device *dev) >>> struct rockchip_pcie *rockchip =3D dev_get_drvdata(dev); >>> int err; >>> =20 >>> - if (!IS_ERR(rockchip->vpcie0v9)) { >>> - err =3D regulator_enable(rockchip->vpcie0v9); >>> - if (err) { >>> - dev_err(dev, "fail to enable vpcie0v9 regulator\n"); >>> - return err; >>> - } >>> + err =3D regulator_enable(rockchip->vpcie0v9); >>> + if (err) { >>> + dev_err(dev, "fail to enable vpcie0v9 regulator\n"); >>> + return err; >>> } >>> =20 >>> err =3D rockchip_pcie_enable_clocks(rockchip); >>> @@ -939,8 +925,7 @@ static int __maybe_unused rockchip_pcie_resume_noir= q(struct device *dev) >>> err_pcie_resume: >>> rockchip_pcie_disable_clocks(rockchip); >>> err_disable_0v9: >>> - if (!IS_ERR(rockchip->vpcie0v9)) >>> - regulator_disable(rockchip->vpcie0v9); >>> + regulator_disable(rockchip->vpcie0v9); >>> return err; >>> } >>> =20 >>> @@ -1081,10 +1066,8 @@ static int rockchip_pcie_probe(struct platform_d= evice *pdev) >>> regulator_disable(rockchip->vpcie12v); >>> if (!IS_ERR(rockchip->vpcie3v3)) >>> regulator_disable(rockchip->vpcie3v3); >>> - if (!IS_ERR(rockchip->vpcie1v8)) >>> - regulator_disable(rockchip->vpcie1v8); >>> - if (!IS_ERR(rockchip->vpcie0v9)) >>> - regulator_disable(rockchip->vpcie0v9); >>> + regulator_disable(rockchip->vpcie1v8); >>> + regulator_disable(rockchip->vpcie0v9); >>> err_set_vpcie: >>> rockchip_pcie_disable_clocks(rockchip); >>> return err; >>> @@ -1108,10 +1091,8 @@ static int rockchip_pcie_remove(struct platform_= device *pdev) >>> regulator_disable(rockchip->vpcie12v); >>> if (!IS_ERR(rockchip->vpcie3v3)) >>> regulator_disable(rockchip->vpcie3v3); >>> - if (!IS_ERR(rockchip->vpcie1v8)) >>> - regulator_disable(rockchip->vpcie1v8); >>> - if (!IS_ERR(rockchip->vpcie0v9)) >>> - regulator_disable(rockchip->vpcie0v9); >>> + regulator_disable(rockchip->vpcie1v8); >>> + regulator_disable(rockchip->vpcie0v9); >>> =20 >>> return 0; >>> } >>> --=20 >>> 2.17.1 >>> >> >> _______________________________________________ >> linux-arm-kernel mailing list >> linux-arm-kernel@lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel >>