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Subject: Re: [PATCH] arm64: Enable PCI write-combine resources under sysfs
From:   Benjamin Herrenschmidt <benh@kernel.crashing.org>
To:     Catalin Marinas <catalin.marinas@arm.com>,
        Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc:     Clint Sbisa <csbisa@amazon.com>, linux-pci@vger.kernel.org,
        Bjorn Helgaas <helgaas@kernel.org>,
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Date:   Thu, 03 Sep 2020 09:08:06 +1000
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On Wed, 2020-09-02 at 18:21 +0100, Catalin Marinas wrote:
> > I understand we do want weak ordering for prefetchable BAR mappings
> > but my worry is that by exposing the resources as WC to user space
> > we are giving user space the impression that those mappings mirror
> > x86 WC mappings behaviour that is not true on ARM64.
> 
> Would Device_GRE be close to the x86 WC better? It won't allow
> unaligned
> accesses and that can be problematic for the user. OTOH, it doesn't
> speculate reads, so it's safer from the hardware perspective.

Its accepted generally that prefetchable BARs can allow speculative
accesses, write combining, re-ordering even etc... and it's also
commonly be the target of unaligned accesses.

In reality, in PCI land, it really means "no side effects".

Cheers,
Ben.