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b=DHPrLBXfxz7BwCAjEN/gPKJDzGH1b0YxCEirOwcmHJfy8et039ZSiuNeEDLxJevV6+8SSp Uf92kSwLAPHevjCw== Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 1CAEC1397F; Sat, 17 Aug 2024 16:45:13 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id Zv48BJnTwGb9dwAAD6G6ig (envelope-from ); Sat, 17 Aug 2024 16:45:13 +0000 Message-ID: <34165aca-e392-4735-a58e-44e496e99a2c@suse.de> Date: Sat, 17 Aug 2024 19:45:12 +0300 Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 10/13] PCI: brcmstb: Refactor for chips with many regular inbound windows To: Jim Quinlan , linux-pci@vger.kernel.org, Nicolas Saenz Julienne , Bjorn Helgaas , Lorenzo Pieralisi , Cyril Brulebois , Stanimir Varbanov , Manivannan Sadhasivam , Krzysztof Kozlowski , bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com Cc: Florian Fainelli , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" , "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" , open list References: <20240815225731.40276-1-james.quinlan@broadcom.com> <20240815225731.40276-11-james.quinlan@broadcom.com> Content-Language: en-US From: Stanimir Varbanov In-Reply-To: <20240815225731.40276-11-james.quinlan@broadcom.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Flag: NO X-Rspamd-Action: no action X-Rspamd-Queue-Id: EF3A92253A X-Spam-Level: X-Rspamd-Server: rspamd2.dmz-prg2.suse.org X-Spamd-Result: default: False [-6.51 / 50.00]; BAYES_HAM(-3.00)[100.00%]; DWL_DNSWL_MED(-2.00)[suse.de:dkim]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_DKIM_ALLOW(-0.20)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; MX_GOOD(-0.01)[]; FUZZY_BLOCKED(0.00)[rspamd.com]; DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; SPAMHAUS_XBL(0.00)[2a07:de40:b281:104:10:150:64:97:from]; RCPT_COUNT_TWELVE(0.00)[18]; ARC_NA(0.00)[]; FREEMAIL_TO(0.00)[broadcom.com,vger.kernel.org,kernel.org,google.com,arm.com,debian.org,suse.de,linaro.org,gmail.com]; MIME_TRACE(0.00)[0:+]; FREEMAIL_ENVRCPT(0.00)[gmail.com]; TO_DN_SOME(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; DNSWL_BLOCKED(0.00)[2a07:de40:b281:104:10:150:64:97:from,2a07:de40:b281:106:10:150:64:167:received]; RCVD_VIA_SMTP_AUTH(0.00)[]; MID_RHS_MATCH_FROM(0.00)[]; RCVD_TLS_ALL(0.00)[]; DKIM_TRACE(0.00)[suse.de:+]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:mid,suse.de:dkim,suse.de:email] X-Spam-Score: -6.51 On 8/16/24 01:57, Jim Quinlan wrote: > Provide support for new chips with multiple inbound windows while > keeping the legacy support for the older chips. > > In existing chips there are three inbound windows with fixed purposes: the > first was for mapping SoC internal registers, the second was for memory, > and the third was for memory but with the endian swapped. Typically, only > one window was used. > > Complicating the inbound window usage was the fact that the PCIe HW would > do a baroque internal mapping of system memory, and concatenate the regions > of multiple memory controllers. > > Newer chips such as the 7712 and Cable Modem SOCs take a step forward and > drop the internal mapping while providing for multiple inbound windows. > This works in concert with the dma-ranges property, where each provided > range becomes an inbound window. > > Signed-off-by: Jim Quinlan > --- > drivers/pci/controller/pcie-brcmstb.c | 235 ++++++++++++++++++++------ > 1 file changed, 181 insertions(+), 54 deletions(-) Reviewed-by: Stanimir Varbanov ~Stan