From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
To: John Madieu <john.madieu.xa@bp.renesas.com>,
claudiu.beznea.uj@bp.renesas.com, lpieralisi@kernel.org,
kwilczynski@kernel.org, mani@kernel.org, geert+renesas@glider.be,
krzk+dt@kernel.org
Cc: robh@kernel.org, bhelgaas@google.com, conor+dt@kernel.org,
magnus.damm@gmail.com, biju.das.jz@bp.renesas.com,
linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
john.madieu@gmail.com
Subject: Re: [PATCH v4 07/15] PCI: rzg3s-host: Make SYSC register offsets SoC-specific
Date: Fri, 30 Jan 2026 15:53:22 +0200 [thread overview]
Message-ID: <377dfea9-83fd-4e76-b469-c2336118f964@tuxon.dev> (raw)
In-Reply-To: <20260129214130.16067-8-john.madieu.xa@bp.renesas.com>
On 1/29/26 23:41, John Madieu wrote:
> In preparation for adding RZ/G3E support, move the RST_RSM_B register
> offset and mask into a SoC-specific data structure. Compared with RZ/G3S,
> the RZ/G3E SYSC controls different functionalities for the PCIe controller.
>
> Make SYSC operations conditional on the presence of register offset
> information, allowing the driver to handle SoCs that don't use the
> RST_RSM_B signal.
>
> Signed-off-by: John Madieu<john.madieu.xa@bp.renesas.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
next prev parent reply other threads:[~2026-01-30 13:53 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-29 21:41 [PATCH v4 00/15] PCI: renesas: Add RZ/G3E PCIe controller support John Madieu
2026-01-29 21:41 ` [PATCH v4 01/15] PCI: rzg3s-host: Fix reset handling in probe error path John Madieu
2026-01-29 21:41 ` [PATCH v4 02/15] PCI: renesas: rzg3s: Rework inbound window algorithm for multi-SoC support John Madieu
2026-01-30 13:52 ` Claudiu Beznea
2026-01-30 20:14 ` John Madieu
2026-01-29 21:41 ` [PATCH v4 03/15] clk: renesas: rzv2h-cpg: Add support for init_{off|asserted} clocks/resets John Madieu
2026-01-29 21:41 ` [PATCH v4 04/15] clk: renesas: r9a09g047: Add PCIe clocks and reset John Madieu
2026-01-29 21:41 ` [PATCH v4 05/15] dt-bindings: PCI: renesas,r9a08g045s33-pcie: Fix naming properties John Madieu
2026-01-30 13:53 ` Claudiu Beznea
2026-01-29 21:41 ` [PATCH v4 06/15] dt-bindings: PCI: renesas,r9a08g045s33-pcie: Document RZ/G3E SoC John Madieu
2026-02-09 17:51 ` Rob Herring (Arm)
2026-01-29 21:41 ` [PATCH v4 07/15] PCI: rzg3s-host: Make SYSC register offsets SoC-specific John Madieu
2026-01-30 13:53 ` Claudiu Beznea [this message]
2026-01-29 21:41 ` [PATCH v4 08/15] PCI: rzg3s-host: Make configuration reset lines optional John Madieu
2026-01-29 21:41 ` [PATCH v4 09/15] PCI: rzg3s-host: Add SoC-specific configuration and initialization callbacks John Madieu
2026-01-30 13:54 ` Claudiu Beznea
2026-01-29 21:41 ` [PATCH v4 10/15] PCI: rzg3s-host: Explicitly set class code for RZ/G3E compatibility John Madieu
2026-01-30 13:55 ` Claudiu Beznea
2026-01-30 15:08 ` Geert Uytterhoeven
2026-01-30 20:26 ` John Madieu
2026-01-29 21:41 ` [PATCH v4 11/15] PCI: rzg3s-host: Add PCIe Gen3 (8.0 GT/s) link speed support John Madieu
2026-01-29 21:41 ` [PATCH v4 12/15] PCI: rzg3s-host: Add support for RZ/G3E PCIe controller John Madieu
2026-01-30 13:57 ` Claudiu Beznea
2026-01-30 20:23 ` John Madieu
2026-01-29 21:41 ` [PATCH v4 13/15] arm64: dts: renesas: r9a09g047: Add PCIe node John Madieu
2026-01-29 21:41 ` [PATCH v4 14/15] arm64: dts: renesas: r9a09g047e57-smarc-som: Add PCIe reference clock John Madieu
2026-01-29 21:41 ` [PATCH v4 15/15] arm64: dts: renesas: r9a09g047e57-smarc: Enable PCIe John Madieu
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