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Date: Wed, 8 Jul 2026 10:52:02 -0600 (MDT)
From: Paul Walmsley <pjw@kernel.org>
To: Jia Wang <wangjia@ultrarisc.com>
cc: Paul Walmsley <pjw@kernel.org>, Palmer Dabbelt <palmer@dabbelt.com>, 
    Albert Ou <aou@eecs.berkeley.edu>, Alexandre Ghiti <alex@ghiti.fr>, 
    Lorenzo Pieralisi <lpieralisi@kernel.org>, 
    =?ISO-8859-2?Q?Krzysztof_Wilczy=F1ski?= <kwilczynski@kernel.org>, 
    Manivannan Sadhasivam <mani@kernel.org>, Rob Herring <robh@kernel.org>, 
    Bjorn Helgaas <bhelgaas@google.com>, Jingoo Han <jingoohan1@gmail.com>, 
    Xincheng Zhang <zhangxincheng@ultrarisc.com>, 
    Krzysztof Kozlowski <krzk+dt@kernel.org>, 
    Conor Dooley <conor+dt@kernel.org>, linux-riscv@lists.infradead.org, 
    linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, 
    devicetree@vger.kernel.org, Conor Dooley <conor.dooley@microchip.com>
Subject: Re: [PATCH v4 1/3] riscv: add UltraRISC SoC family Kconfig support
In-Reply-To: <20260427-ultrarisc-pcie-v4-1-98935f6cdfb5@ultrarisc.com>
Message-ID: <3cf5f6f0-25f2-c0ca-d0ac-aa8672ea4586@kernel.org>
References: <20260427-ultrarisc-pcie-v4-0-98935f6cdfb5@ultrarisc.com> <20260427-ultrarisc-pcie-v4-1-98935f6cdfb5@ultrarisc.com>
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On Mon, 27 Apr 2026, Jia Wang wrote:

> The first SoC in the UltraRISC series is UR-DP1000, containing octa
> UltraRISC CP100 cores.
> 
> Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
> Acked-by: Conor Dooley <conor.dooley@microchip.com>

I pulled this out and will queue it for v7.2-rc.  As Krzysztof mentioned, 
it's best if you group patches together into separate series that will be 
merged by specific maintainers.


thanks

- Paul