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From: Stefan Roese <sr@denx.de>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: "Pali Rohár" <pali@kernel.org>,
	linux-pci@vger.kernel.org,
	"Bharat Kumar Gogada" <bharat.kumar.gogada@xilinx.com>,
	"Michal Simek" <michal.simek@xilinx.com>,
	"Yao Hongbo" <yaohongbo@linux.alibaba.com>,
	"Naveen Naidu" <naveennaidu479@gmail.com>
Subject: Re: [PATCH v3 2/2] PCI/AER: Enable AER on all PCIe devices supporting it
Date: Thu, 20 Jan 2022 17:59:22 +0100	[thread overview]
Message-ID: <3dcb1639-3234-8c3c-28b4-3be0f66dc29e@denx.de> (raw)
In-Reply-To: <20220120154615.GA1044459@bhelgaas>

On 1/20/22 16:46, Bjorn Helgaas wrote:
> On Thu, Jan 20, 2022 at 08:31:31AM +0100, Stefan Roese wrote:
>> On 1/19/22 11:37, Pali Rohár wrote:
> 
>>> And when you opened this issue with hotplugging, another thing for
>>> followup changes in future is calling pcie_set_ecrc_checking() function
>>> to align ECRC state of newly hotplugged device with "pci=ecrc=..."
>>> cmdline option. As currently it is done only at that function
>>> set_device_error_reporting().
>>
>> Agreed, this is another area to look into. Not sure if it's okay to
>> address this, once this patch-set has been accepted (if it will be).
> 
> ECRC might be something that could be peeled off first to reduce the
> complexity of AER itself.
> 
> The ECRC capability and enable bits are in the AER Capability, so I
> think it should be moved to pci_aer_init() so it happens for every
> device as we enumerate it.

Just that there is no misunderstanding: You are thinking about something
like this:

diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
index 9fa1f97e5b27..5585fefc4d0e 100644
--- a/drivers/pci/pcie/aer.c
+++ b/drivers/pci/pcie/aer.c
@@ -387,6 +387,9 @@ void pci_aer_init(struct pci_dev *dev)
         pci_add_ext_cap_save_buffer(dev, PCI_EXT_CAP_ID_ERR, 
sizeof(u32) * n);

         pci_aer_clear_status(dev);
+
+       /* Enable ECRC checking if enabled and configured */
+       pcie_set_ecrc_checking(dev);
  }

  void pci_aer_exit(struct pci_dev *dev)
@@ -1223,9 +1226,6 @@ static int set_device_error_reporting(struct 
pci_dev *dev, void *data)
                         pci_disable_pcie_error_reporting(dev);
         }

-       if (enable)
-               pcie_set_ecrc_checking(dev);
-
         return 0;
  }

Perhaps as patch 1/3 in this patch series? Or as some completely
separate patch?

Thanks,
Stefan

> As far as I can tell, there is no requirement that every device in the
> path support ECRC, so it can be enabled independently for each device.
> I think devices that don't support ECRC checking must handle TLPs with
> ECRC without error.
> 
> Per Table 6-5, ECRC check failures result in a device logging the
> prefix/header of the TLP and sending ERR_NONFATAL or ERR_COR.  I think
> this is useful regardless of whether AER interrupts are enabled
> because error information is logged where the ECRC failure was
> detected.
> 
> Bjorn
> 

Viele Grüße,
Stefan Roese

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de

  reply	other threads:[~2022-01-20 16:59 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-19  9:21 [PATCH v3 0/2] Fully enable AER Stefan Roese
2022-01-19  9:21 ` [PATCH v3 1/2] PCI/portdrv: Don't disable AER reporting in get_port_device_capability() Stefan Roese
2022-01-19  9:22 ` [PATCH v3 2/2] PCI/AER: Enable AER on all PCIe devices supporting it Stefan Roese
2022-01-19 10:37   ` Pali Rohár
2022-01-20  7:31     ` Stefan Roese
2022-01-20 13:23       ` Pali Rohár
2022-01-20 15:46       ` Bjorn Helgaas
2022-01-20 16:59         ` Stefan Roese [this message]
2022-01-20 17:54           ` Bjorn Helgaas
2022-01-19 18:25   ` Keith Busch
2022-01-19 21:00     ` Bjorn Helgaas
2022-01-19 21:18       ` Keith Busch
2022-01-20  7:32         ` Stefan Roese

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