linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Manikanta Maddireddy <mmaddireddy@nvidia.com>
To: Mikko Perttunen <cyndis@kapsi.fi>, <thierry.reding@gmail.com>,
	<bhelgaas@google.com>, <jonathanh@nvidia.com>,
	<vidyas@nvidia.com>
Cc: <linux-tegra@vger.kernel.org>, <linux-pci@vger.kernel.org>,
	<kthota@nvidia.com>
Subject: Re: [PATCH V2 01/12] PCI: tegra: Start LTSSM after programming root port
Date: Mon, 30 Oct 2017 16:06:24 +0530	[thread overview]
Message-ID: <42a902fb-1481-9fd3-77c7-e18d0d0c306d@nvidia.com> (raw)
In-Reply-To: <5911b4d5-cc54-9fed-f6be-5c9b7ca05c2e@kapsi.fi>



On 30-Oct-17 2:38 PM, Mikko Perttunen wrote:
> On 30.10.2017 06:18, Manikanta Maddireddy wrote:
>> This patch ensures that LTSSM is started (by deasserting pcie_xrst) only
>> after all the required root port register programming is completed.
>>
>> Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
>> ---
>> V2:
>> * no change in this patch
>>
>>  drivers/pci/host/pci-tegra.c | 9 +++++----
>>  1 file changed, 5 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c
>> index 96e8038c3019..b41c60c7414c 100644
>> --- a/drivers/pci/host/pci-tegra.c
>> +++ b/drivers/pci/host/pci-tegra.c
>> @@ -1024,9 +1024,6 @@ static int tegra_pcie_enable_controller(struct tegra_pcie *pcie)
>>          }
>>      }
>>
>> -    /* take the PCIe interface module out of reset */
>> -    reset_control_deassert(pcie->pcie_xrst);
>> -
>>      /* finally enable PCIe */
>>      value = afi_readl(pcie, AFI_CONFIGURATION);
>>      value |= AFI_CONFIGURATION_EN_FPCI;
>> @@ -1065,7 +1062,6 @@ static void tegra_pcie_power_off(struct tegra_pcie *pcie)
>>              dev_err(dev, "failed to power off PHY(s): %d\n", err);
>>      }
>>
>> -    reset_control_assert(pcie->pcie_xrst);
> 
> Why is this change being made? Is there a reason we cannot leave this reset asserted when the controller is powered off?
In this change I moved deassert pcie_xrst to tegra_pcie_enable_ports. tegra_pcie_power_off() will not come into picture after deasserting pcie xrst.
So this asserting pcie xrst redundant now.
> 
>>      reset_control_assert(pcie->afi_rst);
>>      reset_control_assert(pcie->pex_rst);
>>
>> @@ -2116,7 +2112,12 @@ static void tegra_pcie_enable_ports(struct tegra_pcie *pcie)
>>               port->index, port->lanes);
>>
>>          tegra_pcie_port_enable(port);
>> +    }
>>
>> +    /* take the PCIe interface module out of reset */
>> +    reset_control_deassert(pcie->pcie_xrst);
>> +
>> +    list_for_each_entry_safe(port, tmp, &pcie->ports, list) {
>>          if (tegra_pcie_port_check_link(port))
>>              continue;
>>
>>

  reply	other threads:[~2017-10-30 10:37 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-30  4:18 [PATCH V2 00/12] Enable Tegra root port features and apply SW fixups Manikanta Maddireddy
2017-10-30  4:18 ` [PATCH V2 01/12] PCI: tegra: Start LTSSM after programming root port Manikanta Maddireddy
2017-10-30  9:08   ` Mikko Perttunen
2017-10-30 10:36     ` Manikanta Maddireddy [this message]
2017-10-30  4:18 ` [PATCH V2 02/12] PCI: tegra: Move REFCLK pad settings out of phy_power_on() Manikanta Maddireddy
2017-10-30  9:13   ` Mikko Perttunen
2017-10-30  4:18 ` [PATCH V2 03/12] PCI: tegra: Retrain link for Gen2 speed Manikanta Maddireddy
2017-10-30  9:31   ` Mikko Perttunen
2017-10-30  4:18 ` [PATCH V2 04/12] PCI: tegra: Advertise AER capability Manikanta Maddireddy
2017-10-30  9:36   ` Mikko Perttunen
2017-10-30 11:49     ` Manikanta Maddireddy
2017-10-30  4:18 ` [PATCH V2 05/12] PCI: tegra: Program UPHY electrical settings in Tegra210 Manikanta Maddireddy
2017-10-30  9:56   ` Mikko Perttunen
2017-10-30  4:18 ` [PATCH V2 06/12] PCI: tegra: Enable opportunistic update FC and ACK Manikanta Maddireddy
2017-10-30  9:58   ` Mikko Perttunen
2017-10-30  4:18 ` [PATCH V2 07/12] PCI: tegra: Disable AFI dynamic clock gating Manikanta Maddireddy
2017-10-30 10:00   ` Mikko Perttunen
2017-10-30  4:18 ` [PATCH V2 08/12] PCI: tegra: Wait for DLLP to finish before entering L1 or L2 Manikanta Maddireddy
2017-10-30 10:02   ` Mikko Perttunen
2017-10-30  4:19 ` [PATCH V2 09/12] PCI: tegra: Enable PCIe xclk clock clamping Manikanta Maddireddy
2017-10-30 10:06   ` Mikko Perttunen
2017-10-30 12:03     ` Manikanta Maddireddy
2017-10-30  4:19 ` [PATCH V2 10/12] PCI: tegra: Add SW fixup for RAW violations Manikanta Maddireddy
2017-10-30 10:09   ` Mikko Perttunen
2017-10-30  4:19 ` [PATCH V2 11/12] PCI: tegra: Increase the deskew retry time Manikanta Maddireddy
2017-10-30 10:10   ` Mikko Perttunen
2017-10-30  4:19 ` [PATCH V2 12/12] PCI: tegra: Update flow control threshold in Tegra210 Manikanta Maddireddy
2017-10-30 10:11   ` Mikko Perttunen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=42a902fb-1481-9fd3-77c7-e18d0d0c306d@nvidia.com \
    --to=mmaddireddy@nvidia.com \
    --cc=bhelgaas@google.com \
    --cc=cyndis@kapsi.fi \
    --cc=jonathanh@nvidia.com \
    --cc=kthota@nvidia.com \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-tegra@vger.kernel.org \
    --cc=thierry.reding@gmail.com \
    --cc=vidyas@nvidia.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).