From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EBC001E8342; Wed, 27 Aug 2025 07:22:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756279358; cv=none; b=uGX6ynxlyr209styAtdI7XkVGo0MJQu61yorK1jiI370xH7YKODeAdEBqCM3Cgwm14GuecTlmjJxqdkSIqpNWY7/1LKwnPezT7bub5G5fcULgHtusopYsXEyMEDsLMLtkeWkkmRjxEARVlro9OXCl+8ny7xve3LSZhr+9dMbAhM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756279358; c=relaxed/simple; bh=G+hmXrHggGQu/DFm2iaN9YOAsgDAVtUlcX4wbDIaTAM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=gT2CqTUhQB7mj9sfaXFwIqSImjC1VU/VzP0rnOvm3DTWKqtxp8Byk6M8sWACmQlywhIFkHa6R8p9KG44WEQdPBJXlygFB1DZoBjko89DgTF2fdBCWOelIACLgR/5q6biqt8q/UaQx+c2p6gW6QPGpDIYgxofYUqjsHaFq4fQ8ZE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=paqG0/bt; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="paqG0/bt" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Type:Content-Transfer-Encoding:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To; bh=G+hmXrHggGQu/DFm2iaN9YOAsgDAVtUlcX4wbDIaTAM=; b=paqG0/btPjpriUue1ZLq40xLBd GBgOWrFL05XOmF286hGkQVhrhfZqZimImLzlqfvnvVlVMHo57pYqqanZe5p+RWyExLLfK8pM6Q5Cq xdTc0nJjioWVaXjKpM6xHGG33hNdJlVOqRRL+S4OzGg7IrzrmTrdXDfSV/OniMWb8NfMr7hViTPqT qh4CArG3EfgYiwDGIxDxzDICg/hr95MIGKc/d2Fy1Rh+nq9Okcnz7bP4oClR/Liyw76jtlNxiWYgk upeAZRYX6mfLnf/YA7pnADtT8ZXvkmab4GGfHfUpjyupzxU/QmqBCPG9/xLHsUBttuD7WbfOzPmK7 upjPzyNA==; Received: from [213.244.170.152] (helo=phil.localnet) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1urATt-00078I-85; Wed, 27 Aug 2025 09:22:05 +0200 From: Heiko Stuebner To: Yury Norov , Rasmus Villemoes , Jaehoon Chung , Ulf Hansson , Shreeya Patel , Mauro Carvalho Chehab , Sandy Huang , Andy Yan , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Vinod Koul , Kishon Vijay Abraham I , Nicolas Frattaroli , Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Shawn Lin , Lorenzo Pieralisi , Krzysztof =?UTF-8?B?V2lsY3p5xYRza2k=?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Chanwoo Choi , MyungJoo Ham , Kyungmin Park , Qin Jian , Michael Turquette , Stephen Boyd , Nathan Chancellor , Nick Desaulniers , Bill Wendling , Justin Stitt , Nicolas Frattaroli Cc: kernel@collabora.com, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-phy@lists.infradead.org, linux-sound@vger.kernel.org, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-pci@vger.kernel.org, linux-pm@vger.kernel.org, linux-clk@vger.kernel.org, llvm@lists.linux.dev, Nicolas Frattaroli Subject: Re: [PATCH v3 07/20] drm/rockchip: dsi: switch to FIELD_PREP_WM16* macros Date: Wed, 27 Aug 2025 09:22:04 +0200 Message-ID: <4886676.atdPhlSkOF@phil> In-Reply-To: <20250825-byeword-update-v3-7-947b841cdb29@collabora.com> References: <20250825-byeword-update-v3-0-947b841cdb29@collabora.com> <20250825-byeword-update-v3-7-947b841cdb29@collabora.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Am Montag, 25. August 2025, 10:28:27 Mitteleurop=C3=A4ische Sommerzeit schr= ieb Nicolas Frattaroli: > The era of hand-rolled HIWORD_UPDATE macros is over, at least for those > drivers that use constant masks. >=20 > Remove this driver's HIWORD_UPDATE macro, and replace instances of it > with either FIELD_PREP_WM16 or FIELD_PREP_WM16_CONST, depending on > whether they're in an initializer. This gives us better error checking, > which already saved me some trouble during this refactor. >=20 > The driver's HIWORD_UPDATE macro doesn't shift up the value, but expects > a pre-shifted value. Meanwhile, FIELD_PREP_WM16 and > FIELD_PREP_WM16_CONST will shift the value for us, based on the given > mask. So a few things that used to be a HIWORD_UPDATE(VERY_LONG_FOO, > VERY_LONG_FOO) are now a somewhat more pleasant > FIELD_PREP_WM16(VERY_LONG_FOO, 1). >=20 > There are some non-trivial refactors here. A few literals needed a UL > suffix added to stop them from unintentionally overflowing as a signed > long. To make sure all of these cases are caught, and not just the ones > where the FIELD_PREP_WM16* macros use such a value as a mask, just mark > every literal that's used as a mask as unsigned. >=20 > Non-contiguous masks also have to be split into multiple > FIELD_PREP_WM16* instances, as the macro's checks and shifting logic > rely on contiguous masks. >=20 > This is compile-tested only. >=20 > Signed-off-by: Nicolas Frattaroli Reviewed-by: Heiko Stuebner