From: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@linux.intel.com>
To: "Fabio M. De Francesco" <fabio.m.de.francesco@linux.intel.com>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Len Brown <lenb@kernel.org>, Davidlohr Bueso <dave@stgolabs.net>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
Dave Jiang <dave.jiang@intel.com>,
Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Mahesh J Salgaonkar <mahesh@linux.ibm.com>,
Oliver O'Halloran <oohall@gmail.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Tony Luck <tony.luck@intel.com>, Borislav Petkov <bp@alien8.de>,
linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org,
linux-cxl@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
linux-pci@vger.kernel.org, linux-edac@vger.kernel.org
Cc: Yazen Ghannam <yazen.ghannam@amd.com>
Subject: Re: [PATCH 4/4 v3] ACPI: extlog: Trace CPER CXL Protocol Error Section
Date: Tue, 3 Jun 2025 15:11:35 -0700 [thread overview]
Message-ID: <4a0f5b75-d6d4-4914-bb17-16d717803aa5@linux.intel.com> (raw)
In-Reply-To: <20250603155536.577493-5-fabio.m.de.francesco@linux.intel.com>
On 6/3/25 8:54 AM, Fabio M. De Francesco wrote:
> When Firmware First is enabled, BIOS handles errors first and then it makes
> them available to the kernel via the Common Platform Error Record (CPER)
> sections (UEFI 2.10 Appendix N). Linux parses the CPER sections via one of
> two similar paths, either ELOG or GHES. The errors managed by ELOG are
> signaled to the BIOS by the I/O Machine Check Architecture (I/O MCA).
>
> Currently, ELOG and GHES show some inconsistencies in how they report to
> userspace via trace events.
>
> Therefore, make the two mentioned paths act similarly by tracing the CPER
> CXL Protocol Error Section (UEFI v2.10, Appendix N.2.13).
>
> Cc: Dan Williams <dan.j.williams@intel.com>
> Signed-off-by: Fabio M. De Francesco <fabio.m.de.francesco@linux.intel.com>
> ---
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
> drivers/acpi/acpi_extlog.c | 64 ++++++++++++++++++++++++++++++++++++++
> drivers/cxl/core/ras.c | 6 ++++
> include/cxl/event.h | 2 ++
> 3 files changed, 72 insertions(+)
>
> diff --git a/drivers/acpi/acpi_extlog.c b/drivers/acpi/acpi_extlog.c
> index b2928ff297eda..de4f617f32d49 100644
> --- a/drivers/acpi/acpi_extlog.c
> +++ b/drivers/acpi/acpi_extlog.c
> @@ -12,6 +12,7 @@
> #include <linux/ratelimit.h>
> #include <linux/edac.h>
> #include <linux/ras.h>
> +#include <cxl/event.h>
> #include <acpi/ghes.h>
> #include <asm/cpu.h>
> #include <asm/mce.h>
> @@ -160,6 +161,62 @@ static void extlog_print_pcie(struct cper_sec_pcie *pcie_err,
> pci_dev_put(pdev);
> }
>
> +static void
> +extlog_cxl_cper_handle_prot_err(struct cxl_cper_sec_prot_err *prot_err,
> + int severity)
> +{
> +#ifdef CONFIG_ACPI_APEI_PCIEAER
> + struct cxl_cper_prot_err_work_data wd;
> + u8 *dvsec_start, *cap_start;
> +
> + if (!(prot_err->valid_bits & PROT_ERR_VALID_AGENT_ADDRESS)) {
> + pr_err_ratelimited("CXL CPER invalid agent type\n");
> + return;
> + }
> +
> + if (!(prot_err->valid_bits & PROT_ERR_VALID_ERROR_LOG)) {
> + pr_err_ratelimited("CXL CPER invalid protocol error log\n");
> + return;
> + }
> +
> + if (prot_err->err_len != sizeof(struct cxl_ras_capability_regs)) {
> + pr_err_ratelimited("CXL CPER invalid RAS Cap size (%u)\n",
> + prot_err->err_len);
> + return;
> + }
> +
> + if ((prot_err->agent_type == RCD || prot_err->agent_type == DEVICE ||
> + prot_err->agent_type == LD || prot_err->agent_type == FMLD) &&
> + !(prot_err->valid_bits & PROT_ERR_VALID_SERIAL_NUMBER))
> + pr_warn(FW_WARN "CXL CPER no device serial number\n");
> +
> + switch (prot_err->agent_type) {
> + case RCD:
> + case DEVICE:
> + case LD:
> + case FMLD:
> + case RP:
> + case DSP:
> + case USP:
> + memcpy(&wd.prot_err, prot_err, sizeof(wd.prot_err));
> +
> + dvsec_start = (u8 *)(prot_err + 1);
> + cap_start = dvsec_start + prot_err->dvsec_len;
> +
> + memcpy(&wd.ras_cap, cap_start, sizeof(wd.ras_cap));
> + wd.severity = cper_severity_to_aer(severity);
> + break;
> + default:
> + pr_err_ratelimited("CXL CPER reserved agent type: %d\n",
> + prot_err->agent_type);
> + return;
> + }
> +
> + cxl_cper_ras_handle_prot_err(&wd);
> +
> +#endif
> +}
> +
> static int extlog_print(struct notifier_block *nb, unsigned long val,
> void *data)
> {
> @@ -211,6 +268,12 @@ static int extlog_print(struct notifier_block *nb, unsigned long val,
> if (gdata->error_data_length >= sizeof(*mem))
> trace_extlog_mem_event(mem, err_seq, fru_id, fru_text,
> (u8)gdata->error_severity);
> + } else if (guid_equal(sec_type, &CPER_SEC_CXL_PROT_ERR)) {
> + struct cxl_cper_sec_prot_err *prot_err =
> + acpi_hest_get_payload(gdata);
> +
> + extlog_cxl_cper_handle_prot_err(prot_err,
> + gdata->error_severity);
> } else if (guid_equal(sec_type, &CPER_SEC_PCIE)) {
> struct cper_sec_pcie *pcie_err = acpi_hest_get_payload(gdata);
>
> @@ -378,3 +441,4 @@ module_exit(extlog_exit);
> MODULE_AUTHOR("Chen, Gong <gong.chen@intel.com>");
> MODULE_DESCRIPTION("Extended MCA Error Log Driver");
> MODULE_LICENSE("GPL");
> +MODULE_IMPORT_NS("CXL");
> diff --git a/drivers/cxl/core/ras.c b/drivers/cxl/core/ras.c
> index 485a831695c70..56db290c88d35 100644
> --- a/drivers/cxl/core/ras.c
> +++ b/drivers/cxl/core/ras.c
> @@ -98,6 +98,12 @@ static void cxl_cper_handle_prot_err(struct cxl_cper_prot_err_work_data *data)
> cxl_cper_trace_uncorr_prot_err(pdev, data->ras_cap);
> }
>
> +void cxl_cper_ras_handle_prot_err(struct cxl_cper_prot_err_work_data *wd)
> +{
> + cxl_cper_handle_prot_err(wd);
> +}
> +EXPORT_SYMBOL_NS_GPL(cxl_cper_ras_handle_prot_err, "CXL");
> +
> static void cxl_cper_prot_err_work_fn(struct work_struct *work)
> {
> struct cxl_cper_prot_err_work_data wd;
> diff --git a/include/cxl/event.h b/include/cxl/event.h
> index f9ae1796da85f..aef906e260330 100644
> --- a/include/cxl/event.h
> +++ b/include/cxl/event.h
> @@ -285,4 +285,6 @@ static inline int cxl_cper_prot_err_kfifo_get(struct cxl_cper_prot_err_work_data
> }
> #endif
>
> +void cxl_cper_ras_handle_prot_err(struct cxl_cper_prot_err_work_data *wd);
> +
> #endif /* _LINUX_CXL_EVENT_H */
--
Sathyanarayanan Kuppuswamy
Linux Kernel Developer
prev parent reply other threads:[~2025-06-03 22:11 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-03 15:54 [PATCH 0/4 v3] Make ELOG and GHES log and trace consistently Fabio M. De Francesco
2025-06-03 15:54 ` [PATCH 1/4 v3] ACPI: extlog: Trace CPER Non-standard Section Body Fabio M. De Francesco
2025-06-03 21:14 ` Dave Jiang
2025-06-04 5:49 ` Zhuo, Qiuxu
2025-06-03 15:54 ` [PATCH 2/4 v3] PCI/AER: Modify pci_print_aer() to take log level Fabio M. De Francesco
2025-06-03 20:51 ` Sathyanarayanan Kuppuswamy
2025-06-03 21:23 ` Dave Jiang
2025-06-03 15:54 ` [PATCH 3/4 v3] ACPI: extlog: Trace CPER PCI Express Error Section Fabio M. De Francesco
2025-06-03 21:33 ` Dave Jiang
2025-06-03 21:49 ` Dave Jiang
2025-06-03 22:18 ` Sathyanarayanan Kuppuswamy
2025-06-04 14:25 ` Zhuo, Qiuxu
2025-06-03 15:54 ` [PATCH 4/4 v3] ACPI: extlog: Trace CPER CXL Protocol " Fabio M. De Francesco
2025-06-03 21:44 ` Dave Jiang
2025-06-03 22:11 ` Sathyanarayanan Kuppuswamy [this message]
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