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Wed, 3 Jul 2024 04:52:50 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.11.0-alpha0-566-g3812ddbbc-fm-20240627.001-g3812ddbb Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <4c5e0f77-b24d-47dd-86d2-31cb8e44b42a@app.fastmail.com> In-Reply-To: References: <20240629052247.2653363-1-uwu@icenowy.me> <20240629052247.2653363-3-uwu@icenowy.me> <2760BA02-8FF8-4B29-BFE2-1322B5BFB6EC@icenowy.me> <7e30177b-ff13-4fed-aa51-47a9cbd5d572@amd.com> <6303afecce2dff9e7d30f67e0a74205256e0a524.camel@icenowy.me> Date: Wed, 03 Jul 2024 16:52:30 +0800 From: "Jiaxun Yang" To: =?UTF-8?Q?Christian_K=C3=B6nig?= , "Icenowy Zheng" , "Huang Rui" , "Maarten Lankhorst" , "Maxime Ripard" , "Thomas Zimmermann" , "David Airlie" , "Daniel Vetter" , bhelgaas@google.com Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: PCIe coherency in spec (was: [RFC PATCH 2/2] drm/ttm: downgrade cached to write_combined when snooping not available) Content-Type: text/plain;charset=utf-8 Content-Transfer-Encoding: quoted-printable =E5=9C=A82024=E5=B9=B47=E6=9C=882=E6=97=A5=E4=B8=83=E6=9C=88 =E4=B8=8B=E5= =8D=886:03=EF=BC=8CJiaxun Yang=E5=86=99=E9=81=93=EF=BC=9A > =E5=9C=A82024=E5=B9=B47=E6=9C=882=E6=97=A5=E4=B8=83=E6=9C=88 =E4=B8=8B= =E5=8D=885:27=EF=BC=8CChristian K=C3=B6nig=E5=86=99=E9=81=93=EF=BC=9A >> Am 02.07.24 um 11:06 schrieb Icenowy Zheng: >>> [SNIP] However I don't think the definition of the AGP spec could ap= ply on all >>> PCI(e) implementations. The AGP spec itself don't apply on >>> implementations that do not implement AGP (which is the most PCI(e) >>> implementations today), and it's not in the reference list of the PC= Ie >>> spec, so it does no help on this context.=20 >> No, exactly that is not correct. >> >> See as I explained the No-Snoop extension to PCIe was created to help=20 >> with AGP support and later merged into the base PCIe specification. >> >> So the AGP spec is now part of the PCIe spec. Hi Bjorn & linux-pci folks, It seems like we have some disputes on interpretation pf PCIe specificat= ion. We are seeking your expertise on the question: Does PCIe specification m= andate Cache coherency via snoop? There are some further context in this thread [1]. [1]: https://lore.kernel.org/all/0db974d40cd8c5dcc723d43c328bac923e0fe3= 3a.camel@icenowy.me/ Thanks - Jiaxun > > We don't really buy this theory. > > Keyword "AGP" doesn't appear in "PCI Express Base 4.0 Base Specificati= on" even > once. > > If PCIe is a predecessor of AGP, where does AGP specific software inte= rface like > AGP aperture goes? PCIe GPUs are only borrowing software concepts fro= m AGP, > but they didn't inherit any hardware properties. > > [...] >> We seem to have a misunderstanding here, this is not a software issue= .=20 >> The hardware platform is considered broken by the hardware vendor! > > It's up to the specification text to define compliance means. So far a= s=20 > per analysis > from Icenowy of PCIe specification text itself it's not prohibited. > >> >> In other words people have stitched together hardware in a way which = is=20 >> not supported by the creator of that hardware. >> >> So as long as you can't convince anybody from ARM or the RISC-V team = or=20 >> whoever created that hardware to confirm that the hardware actually=20 >> works you won't get any support for that. > > Well we are trying to support them on our own in mainline, we are not = asking > for any support. > > Thanks > - Jiaxun >> >> Regards, >> Christian. > > --=20 > - Jiaxun --=20 - Jiaxun