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From: Don Dutile <ddutile@redhat.com>
To: Jiang Liu <liuj97@gmail.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	Yijing Wang <wangyijing@huawei.com>,
	Yinghai Lu <yinghai@kernel.org>,
	Taku Izumi <izumi.taku@jp.fujitsu.com>,
	"Rafael J . Wysocki" <rjw@sisk.pl>,
	Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org
Subject: Re: [RFC PATCH v2 01/32] PCI: add pcie_flags_reg into struct pci_dev to cache PCIe capabilities register
Date: Wed, 25 Jul 2012 11:12:04 -0400	[thread overview]
Message-ID: <50100CC4.8010706@redhat.com> (raw)
In-Reply-To: <1343147504-25891-2-git-send-email-jiang.liu@huawei.com>

resending since i did a reply vs reply-all last time...

On 07/24/2012 12:31 PM, Jiang Liu wrote:
> From: Yijing Wang<wangyijing@huawei.com>
>
> From: Yijing Wang<wangyijing@huawei.com>
>
> Since PCI Express Capabilities Register is read only, cache its value
> into struct pci_dev to avoid repeatedly calling pci_read_config_*().
>
> Signed-off-by: Yijing Wang<wangyijing@huawei.com>
> Signed-off-by: Jiang Liu<liuj97@gmail.com>
> ---
>   drivers/pci/probe.c |    1 +
>   include/linux/pci.h |   10 ++++++++++
>   2 files changed, 11 insertions(+)
>
> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> index 6c143b4..6fd58df 100644
> --- a/drivers/pci/probe.c
> +++ b/drivers/pci/probe.c
> @@ -929,6 +929,7 @@ void set_pcie_port_type(struct pci_dev *pdev)
>   	pdev->is_pcie = 1;
>   	pdev->pcie_cap = pos;
>   	pci_read_config_word(pdev, pos + PCI_EXP_FLAGS,&reg16);
> +	pdev->pcie_flags_reg = reg16;
>   	pdev->pcie_type = (reg16&  PCI_EXP_FLAGS_TYPE)>>  4;
So, given the patch below, shouldn't the above line be ?
     pdev->pcie_type = pci_pcie_type(pdev);

Missed part of patch ?

>   	pci_read_config_word(pdev, pos + PCI_EXP_DEVCAP,&reg16);
>   	pdev->pcie_mpss = reg16&  PCI_EXP_DEVCAP_PAYLOAD;
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index 5faa831..95662b2 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -258,6 +258,7 @@ struct pci_dev {
>   	u8		pcie_mpss:3;	/* PCI-E Max Payload Size Supported */
>   	u8		rom_base_reg;	/* which config register controls the ROM */
>   	u8		pin;  		/* which interrupt pin this device uses */
> +	u16		pcie_flags_reg;	/* cached PCI-E Capabilities Register */
>
>   	struct pci_driver *driver;	/* which driver has allocated this device */
>   	u64		dma_mask;	/* Mask of the bits of bus address this
> @@ -1650,6 +1651,15 @@ static inline bool pci_is_pcie(struct pci_dev *dev)
>   	return !!pci_pcie_cap(dev);
>   }
>
> +/**
> + * pci_pcie_type - get the PCIe device/port type
> + * @dev: PCI device
> + */
> +static inline int pci_pcie_type(const struct pci_dev *dev)
> +{
> +	return (dev->pcie_flags_reg&  PCI_EXP_FLAGS_TYPE)>>  4;
> +}
> +
>   void pci_request_acs(void);
>   bool pci_acs_enabled(struct pci_dev *pdev, u16 acs_flags);
>   bool pci_acs_path_enabled(struct pci_dev *start,


  reply	other threads:[~2012-07-25 15:12 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-07-24 16:31 [RFC PATCH v2 00/32] provide interfaces to access PCIe capabilities registers Jiang Liu
2012-07-24 16:31 ` [RFC PATCH v2 01/32] PCI: add pcie_flags_reg into struct pci_dev to cache PCIe capabilities register Jiang Liu
2012-07-25 15:12   ` Don Dutile [this message]
2012-07-26 13:47     ` Yijing Wang
2012-07-24 16:31 ` [RFC PATCH v2 02/32] PCI: introduce pci_pcie_type(dev) to replace pci_dev->pcie_type Jiang Liu
2012-07-24 16:31 ` [RFC PATCH v2 03/32] PCI: remove unused field pcie_type from struct pci_dev Jiang Liu
2012-07-24 16:31 ` [RFC PATCH v2 04/32] PCI: add PCIe capabilities access functions to hide differences among PCIe specs Jiang Liu
2012-07-24 21:12   ` Don Dutile
2012-07-29 16:22     ` Jiang Liu
2012-07-24 16:31 ` [RFC PATCH v2 05/32] PCI/core: use PCIe capabilities access functions to simplify implementation Jiang Liu
2012-07-25 21:12   ` Don Dutile
2012-07-29  2:12     ` Jiang Liu
2012-07-24 16:31 ` [RFC PATCH v2 06/32] PCI/hotplug: " Jiang Liu
2012-07-24 16:31 ` [RFC PATCH v2 07/32] PCI/portdrv: " Jiang Liu
2012-07-25  5:51   ` Kaneshige, Kenji
2012-07-25  9:44     ` Jiang Liu
2012-07-24 16:31 ` [RFC PATCH v2 08/32] PCI/pciehp: " Jiang Liu
2012-07-24 16:31 ` [RFC PATCH v2 09/32] PCI/PME: " Jiang Liu
2012-07-24 16:31 ` [RFC PATCH v2 10/32] PCI/AER: " Jiang Liu
2012-07-24 16:31 ` [RFC PATCH v2 11/32] PCI/ASPM: " Jiang Liu
2012-07-24 16:31 ` [RFC PATCH v2 12/32] PCI/ARM: " Jiang Liu
2012-07-24 16:31 ` [RFC PATCH v2 13/32] PCI/MIPS: " Jiang Liu
2012-07-24 16:31 ` [RFC PATCH v2 14/32] PCI/tile: " Jiang Liu
2012-07-24 16:31 ` [RFC PATCH v2 15/32] PCI/r8169: " Jiang Liu
2012-07-24 16:31 ` [RFC PATCH v2 16/32] PCI/broadcom: " Jiang Liu
2012-07-24 16:31 ` [RFC PATCH v2 17/32] PCI/igb: " Jiang Liu
2012-07-24 16:31 ` [RFC PATCH v2 18/32] PCI/vxge: " Jiang Liu
2012-07-24 16:31 ` [RFC PATCH v2 19/32] PCI/mlx4: " Jiang Liu
2012-07-24 16:31 ` [RFC PATCH v2 20/32] PCI/niu: " Jiang Liu
2012-07-24 16:31 ` [RFC PATCH v2 21/32] PCI/myri10ge: " Jiang Liu
2012-07-24 16:31 ` [RFC PATCH v2 22/32] PCI/chelsio: " Jiang Liu
2012-07-24 16:31 ` [RFC PATCH v2 23/32] PCI/atl1c: " Jiang Liu
2012-07-24 21:09 ` [RFC PATCH v2 00/32] provide interfaces to access PCIe capabilities registers Don Dutile
2012-07-29  2:26   ` Jiang Liu

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