From: Jiang Liu <liuj97@gmail.com>
To: Paolo <paolopiace@gmail.com>
Cc: linux-pci@vger.kernel.org
Subject: Re: BAR0/1 & enumeration
Date: Sat, 01 Sep 2012 11:12:11 +0800 [thread overview]
Message-ID: <50417D0B.2070003@gmail.com> (raw)
In-Reply-To: <loom.20120831T214839-854@post.gmane.org>
The genefic PCI/PCIe framework doesn't do any thing special for NTB device,
just treat it as a normal PCI device. The issue you mentioned must be
handled by BIOS/OS driver with device specific knowledge.
--Gerry
On 09/01/2012 03:56 AM, Paolo wrote:
> Not really.
>
> I'm working on a NTB. NTBs are Type-0 headers, like any PCIe end point.
> BAR0/1 on NTB can be set as base address for the config-space of its function OR
> as based address of the memory space for memory transactions.
>
> Hence my initial question. Looking fwd to some hint.
>
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prev parent reply other threads:[~2012-09-01 3:12 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-08-31 19:29 BAR0/1 & enumeration Paolo
2012-08-31 19:46 ` Matthew Wilcox
2012-08-31 19:56 ` Paolo
2012-09-01 3:12 ` Jiang Liu [this message]
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