From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from szxga02-in.huawei.com ([119.145.14.65]:51929 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752522Ab2KVSag (ORCPT ); Thu, 22 Nov 2012 13:30:36 -0500 Message-ID: <50AD85C0.1010407@huawei.com> Date: Thu, 22 Nov 2012 09:54:08 +0800 From: Yijing Wang MIME-Version: 1.0 To: Betty Dall CC: , , , , , Subject: Re: [PATCH] PCI: add PCIe 8.0 GT/s supported link speed define References: <1353437939-29210-1-git-send-email-betty.dall@hp.com> In-Reply-To: <1353437939-29210-1-git-send-email-betty.dall@hp.com> Content-Type: text/plain; charset="UTF-8" Sender: linux-pci-owner@vger.kernel.org List-ID: > diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h > index 20ae747..0cf8abb 100644 > --- a/include/uapi/linux/pci_regs.h > +++ b/include/uapi/linux/pci_regs.h > @@ -469,6 +469,7 @@ > #define PCI_EXP_LNKSTA_CLS 0x000f /* Current Link Speed */ > #define PCI_EXP_LNKSTA_CLS_2_5GB 0x01 /* Current Link Speed 2.5GT/s */ > #define PCI_EXP_LNKSTA_CLS_5_0GB 0x02 /* Current Link Speed 5.0GT/s */ > +#define PCI_EXP_LNKSTA_CLS_8_0GB 0x04 /* Current Link Speed 8.0GT/s */ > #define PCI_EXP_LNKSTA_NLW 0x03f0 /* Nogotiated Link Width */ > #define PCI_EXP_LNKSTA_NLW_SHIFT 4 /* start of NLW mask in link status */ > #define PCI_EXP_LNKSTA_LT 0x0800 /* Link Training */ > Hi Betty, There is another patch uses this PCI_EXP_LNKSTA_CLS_8_0GB ? I think maybe move this change to the patch uses this symbol is better. -- Thanks! Yijing