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From: Kishon Vijay Abraham I <kishon@ti.com>
To: Jingoo Han <jg1.han@samsung.com>
Cc: "'Bjorn Helgaas'" <bhelgaas@google.com>,
	<linux-pci@vger.kernel.org>, <linux-samsung-soc@vger.kernel.org>,
	"'Kukjin Kim'" <kgene.kim@samsung.com>,
	Pratyush Anand <pratyush.anand@st.com>,
	Mohit KUMAR <Mohit.KUMAR@st.com>,
	"'Arnd Bergmann'" <arnd@arndb.de>,
	"'Sean Cross'" <xobs@kosagi.com>,
	"'SRIKANTH TUMKUR SHIVANAND'" <ts.srikanth@samsung.com>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] pci: exynos: split into two parts such as Synopsys part and Exynos part
Date: Wed, 10 Jul 2013 19:32:04 +0530	[thread overview]
Message-ID: <51DD695C.6060209@ti.com> (raw)
In-Reply-To: <000201ce7959$bf0fb150$3d2f13f0$@samsung.com>

Hi,

On Friday 05 July 2013 01:59 PM, Jingoo Han wrote:
> Exynos PCIe IP consists of Synopsys specific part and Exynos
> specific part. Only core block is a Synopsys designware part;
> other parts are Exynos specific.
> Also, the Synopsys designware part can be shared with other
> platforms; thus, it can be split two parts such as Synopsys
> designware part and Exynos specific part.

Thanks for doing that :-)

I'll be using the synopsys specific part as Jacinto6 also uses the same pcie
core. Once I start implementing, I'll have some queries and comments ;-)

Cheers
Kishon

  parent reply	other threads:[~2013-07-10 14:02 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-07-05  8:29 [PATCH] pci: exynos: split into two parts such as Synopsys part and Exynos part Jingoo Han
2013-07-05 10:44 ` Pratyush Anand
2013-07-08  5:06   ` Jingoo Han
2013-07-08  5:13     ` Jingoo Han
2013-07-08  6:55   ` Jingoo Han
2013-07-05 10:45 ` Arnd Bergmann
2013-07-09  1:13   ` Jingoo Han
2013-07-10 14:02 ` Kishon Vijay Abraham I [this message]
2013-07-11  1:36   ` Jingoo Han

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