From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: linux-pci@vger.kernel.org, "Bjorn Helgaas" <bhelgaas@google.com>,
"Kai-Heng Feng" <kaihengf@nvidia.com>,
"Rob Herring" <robh@kernel.org>,
LKML <linux-kernel@vger.kernel.org>,
"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
"Krzysztof Wilczyński" <kw@linux.com>,
Linux-Renesas <linux-renesas-soc@vger.kernel.org>
Subject: Re: [PATCH 0/3] PCI & resource: Make coalescing host bridge windows safer
Date: Wed, 22 Oct 2025 14:13:15 +0300 (EEST) [thread overview]
Message-ID: <51f363d9-9a15-763a-bc1a-be9158253a07@linux.intel.com> (raw)
In-Reply-To: <CAMuHMdWD_GJ0hpJODBNKeR77UhKMW2CuWWf-xJo2kuL514_Tpw@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 7688 bytes --]
On Wed, 22 Oct 2025, Geert Uytterhoeven wrote:
> On Tue, 21 Oct 2025 at 13:54, Ilpo Järvinen
> <ilpo.jarvinen@linux.intel.com> wrote:
> > On Tue, 21 Oct 2025, Geert Uytterhoeven wrote:
> > > On Mon, 20 Oct 2025 at 18:20, Ilpo Järvinen
> > > <ilpo.jarvinen@linux.intel.com> wrote:
> > > > On Mon, 20 Oct 2025, Geert Uytterhoeven wrote:
> > > > > On Fri, 10 Oct 2025 at 16:42, Ilpo Järvinen
> > > > > <ilpo.jarvinen@linux.intel.com> wrote:
> > > > > > Here's a series for Geert to test if this fixes the improper coalescing
> > > > > > of resources as was experienced with the pci_add_resource() change (I
> > > > > > know the breaking change was pulled before 6.18 main PR but I'd want to
> > > > > > retry it later once the known issues have been addressed). The expected
> > > > > > result is there'll be two adjacent host bridge resources in the
> > > > > > resource tree as the different name should disallow coalescing them
> > > > > > together, and therefore BAR0 has a window into which it belongs to.
> > > > > >
> > > > > > Generic info for the series:
> > > > > >
> > > > > > PCI host bridge windows were coalesced in place into one of the structs
> > > > > > on the resources list. The host bridge window coalescing code does not
> > > > > > know who holds references and still needs the struct resource it's
> > > > > > coalescing from/to so it is safer to perform coalescing into entirely
> > > > > > a new struct resource instead and leave the old resource addresses as
> > > > > > they were.
> > > > > >
> > > > > > The checks when coalescing is allowed are also made stricter so that
> > > > > > only resources that have identical the metadata can be coalesced.
> > > > > >
> > > > > > As a bonus, there's also a bit of framework to easily create kunit
> > > > > > tests for resource tree functions (beyond just resource_coalesce()).
> > > > > >
> > > > > > Ilpo Järvinen (3):
> > > > > > PCI: Refactor host bridge window coalescing loop to use prev
> > > > > > PCI: Do not coalesce host bridge resource structs in place
> > > > > > resource, kunit: add test case for resource_coalesce()
> > > > >
> > > > > Thanks for your series!
> > > > >
> > > > > I have applied this on top of commit 06b77d5647a4d6a7 ("PCI:
> > > > > Mark resources IORESOURCE_UNSET when outside bridge windows"), and
> > > > > gave it a a try on Koelsch (R-Car M2-W).
> > > >
> > > > So the pci_bus_add_resource() patch to rcar_pci_probe() was not included?
> > > > No coalescing would be attempted without that change.
> > >
> > > Sorry, I didn't realize you wanted that (and anything else) to be
> > > included, too. Please tell me the exact base I should use for testing,
> > > and I will give it another run.
> >
> > I'm sorry, it's indeed a bit confusing as some of these patches never
> > have been in Linus' tree.
> >
> > So I'm interested on what's the result with these changes/series together:
> >
> > [PATCH 1/2] PCI: Setup bridge resources earlier
> > [PATCH 2/2] PCI: Resources outside their window must set IORESOURCE_UNSET
> > [PATCH 1/1] PCI: rcar-gen2: Add BAR0 into host bridge resources
> > [PATCH 1/3] PCI: Refactor host bridge window coalescing loop to use prev
> > [PATCH 2/3] PCI: Do not coalesce host bridge resource structs in place
> > [PATCH 3/3] resource, kunit: add test case for resource_coalesce()
> >
> > You might also want to change that pci_dbg() in the IORESOURCE_UNSET patch
> > to pci_info() (as otherwise dyndbg is necessary to make it visible).
>
> Thanks, all done:
>
> $ git cherry -v --abbrev=1 v6.18-rc2^
> + 211ddde0 Linux 6.18-rc2
> + 3fdaf2 PCI: Setup bridge resources earlier
> + 5be02e5 PCI: Resources outside their window must set IORESOURCE_UNSET
> + adf6f11 PCI: rcar-gen2: Add BAR0 into host bridge resources
> + eecb500 PCI: Refactor host bridge window coalescing loop to use prev
> + 60470b3 PCI: Do not coalesce host bridge resource structs in place
> + afe3ec resource, kunit: add test case for resource_coalesce()
> + 487c98 Use dev_info() in drivers/pci/probe.c:__pci_read_base()
> IORESOURCE_UNSET path
>
> Compared to v6.18-rc2, dmesg changed (for the first PCI/USB instance)
> like:
>
> pci-rcar-gen2 ee090000.pci: host bridge /soc/pci@ee090000 ranges:
> pci-rcar-gen2 ee090000.pci: MEM 0x00ee080000..0x00ee08ffff
> -> 0x00ee080000
> pci-rcar-gen2 ee090000.pci: PCI: revision 11
> pci-rcar-gen2 ee090000.pci: PCI host bridge to bus 0000:00
> pci_bus 0000:00: root bus resource [bus 00]
> pci_bus 0000:00: root bus resource [mem 0xee080000-0xee08ffff]
> +pci_bus 0000:00: root bus resource [mem 0xee090000-0xee090bff]
> pci 0000:00:00.0: [1033:0000] type 00 class 0x060000 conventional
> PCI endpoint
> pci 0000:00:00.0: BAR 0 [mem 0xee090800-0xee090bff]
> -pci 0000:00:00.0: BAR 1 [mem 0x40000000-0x7fffffff pref]
> +pci 0000:00:00.0: BAR 1 [mem 0x40000000-0x7fffffff pref]: no
> initial claim (no window)
> +pci 0000:00:00.0: BAR 1 [mem size 0x40000000 pref]
> pci 0000:00:01.0: [1033:0035] type 00 class 0x0c0310 conventional
> PCI endpoint
> -pci 0000:00:01.0: BAR 0 [mem 0x00000000-0x00000fff]
> +pci 0000:00:01.0: BAR 0 [mem 0x00000000-0x00000fff]: no initial
> claim (no window)
> +pci 0000:00:01.0: BAR 0 [mem size 0x00001000]
> pci 0000:00:01.0: supports D1 D2
> pci 0000:00:01.0: PME# supported from D0 D1 D2 D3hot
> pci 0000:00:02.0: [1033:00e0] type 00 class 0x0c0320 conventional
> PCI endpoint
> -pci 0000:00:02.0: BAR 0 [mem 0x00000000-0x000000ff]
> +pci 0000:00:02.0: BAR 0 [mem 0x00000000-0x000000ff]: no initial
> claim (no window)
> +pci 0000:00:02.0: BAR 0 [mem size 0x00000100]
> pci 0000:00:02.0: supports D1 D2
> pci 0000:00:02.0: PME# supported from D0 D1 D2 D3hot
> PCI: bus0: Fast back to back transfers disabled
> pci 0000:00:01.0: BAR 0 [mem 0xee080000-0xee080fff]: assigned
> pci 0000:00:02.0: BAR 0 [mem 0xee081000-0xee0810ff]: assigned
> pci_bus 0000:00: resource 4 [mem 0xee080000-0xee08ffff]
> +pci_bus 0000:00: resource 5 [mem 0xee090000-0xee090bff]
> pci 0000:00:01.0: enabling device (0140 -> 0142)
> pci 0000:00:02.0: enabling device (0140 -> 0142)
>
> > The expected result is that those usb resources are properly parented and
> > the ee080000-ee08ffff and ee090000-ee090bff are not coalesced together (as
> > that would destroy information). So something along the lines of:
> >
> > ee080000-ee08ffff : pci@ee090000
> > ee080000-ee080fff : 0000:00:01.0
> > ee080000-ee080fff : ohci_hcd
> > ee081000-ee0810ff : 0000:00:02.0
> > ee081000-ee0810ff : ehci_hcd
> > ee090000-ee090bff : ee090000.pci pci@ee090000
>
> Compared to v6.18-rc2, the output of "lspci -v" or "cat /proc/iomem"
> did not change. Hence for the two PCI/USB instances:
>
> ee080000-ee08ffff : pci@ee090000
> ee080000-ee080fff : 0000:00:01.0
> ee080000-ee080fff : ohci_hcd
> ee081000-ee0810ff : 0000:00:02.0
> ee081000-ee0810ff : ehci_hcd
> ee090000-ee090bff : ee090000.pci pci@ee090000
> ee0c0000-ee0cffff : pci@ee0d0000
> ee0c0000-ee0c0fff : 0001:01:01.0
> ee0c0000-ee0c0fff : ohci_hcd
> ee0c1000-ee0c10ff : 0001:01:02.0
> ee0c1000-ee0c10ff : ehci_hcd
> ee0d0000-ee0d0bff : ee0d0000.pci pci@ee0d0000
Looks it works now when it comes to what PCI: Resources outside their
window must set IORESOURCE_UNSET tried to achieve.
Thanks a lot for all the testing!
--
i.
next prev parent reply other threads:[~2025-10-22 11:13 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-10 14:42 [PATCH 0/3] PCI & resource: Make coalescing host bridge windows safer Ilpo Järvinen
2025-10-10 14:42 ` [PATCH 1/3] PCI: Refactor host bridge window coalescing loop to use prev Ilpo Järvinen
2025-10-10 14:42 ` [PATCH 2/3] PCI: Do not coalesce host bridge resource structs in place Ilpo Järvinen
2025-10-15 14:29 ` Andy Shevchenko
2025-10-20 17:21 ` Ilpo Järvinen
2025-10-20 17:44 ` Andy Shevchenko
2025-10-20 18:15 ` Ilpo Järvinen
2025-10-20 18:30 ` Andy Shevchenko
2025-10-10 14:42 ` [PATCH 3/3] resource, kunit: add test case for resource_coalesce() Ilpo Järvinen
2025-10-20 13:42 ` [PATCH 0/3] PCI & resource: Make coalescing host bridge windows safer Geert Uytterhoeven
2025-10-20 16:20 ` Ilpo Järvinen
2025-10-21 7:44 ` Geert Uytterhoeven
2025-10-21 11:54 ` Ilpo Järvinen
2025-10-21 15:49 ` Andy Shevchenko
2025-10-21 16:09 ` Ilpo Järvinen
2025-10-22 7:19 ` Geert Uytterhoeven
2025-10-22 7:45 ` Geert Uytterhoeven
2025-10-22 11:13 ` Ilpo Järvinen [this message]
2025-10-22 12:14 ` Ilpo Järvinen
2025-10-22 12:51 ` Rob Herring
2025-10-23 23:02 ` Bjorn Helgaas
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