Re: [PATCH v4 3/3] PCI: qcom: Program T_POWER_ON

[Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>]

On 4/10/2026 10:25 PM, Manivannan Sadhasivam wrote:
> On Sat, Apr 04, 2026 at 01:47:20PM +0530, Krishna Chaitanya Chundru wrote:
>> Some platforms have incorrect T_POWER_ON value programmed in hardware.
>> Generally these will be corrected by bootloaders, but not all targets
>> support bootloaders to program correct values due to that
>> LTR_L1.2_THRESHOLD value calculated by aspm driver can be wrong, which
>> can result in improper L1.2 exit behavior and if AER happens to be
>> supported and enabled, the error may be *reported* via AER.
>>
>> Parse "t-power-on-us" property from each root port node and program them
>> as part of host initialization using dw_pcie_program_t_power_on() before
>> link training.
>>
>> This property in added to the dtschema here[1].
>>
>> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
>> Link[1]: https://lore.kernel.org/all/20260205093346.667898-1-krishna.chundru@oss.qualcomm.com/
>> ---
>>  drivers/pci/controller/dwc/pcie-qcom.c | 14 ++++++++++++++
>>  1 file changed, 14 insertions(+)
>>
>> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
>> index 67a16af69ddc75fca1b123e70715e692a91a9135..a8f82f860c08fe2eabad2c0eed541b8dd121215e 100644
>> --- a/drivers/pci/controller/dwc/pcie-qcom.c
>> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
>> @@ -269,6 +269,7 @@ struct qcom_pcie_perst {
>>  struct qcom_pcie_port {
>>  	struct list_head list;
>>  	struct phy *phy;
>> +	u32 l1ss_t_power_on;
>>  	struct list_head perst;
>>  };
>>  
>> @@ -1283,6 +1284,14 @@ static int qcom_pcie_phy_power_on(struct qcom_pcie *pcie)
>>  	return 0;
>>  }
>>  
>> +static void qcom_pcie_configure_ports(struct qcom_pcie *pcie)
>> +{
>> +	struct qcom_pcie_port *port;
>> +
>> +	list_for_each_entry(port, &pcie->ports, list)
>> +		dw_pcie_program_t_power_on(pcie->pci, port->l1ss_t_power_on);
> Since this writes to the same register, there is no point in iterating over all
> ports. Add a TODO here also and write it only once.
we will iterate only once in case of single root port. so we are good here.

- Krishna Chaitanya.
>> +}
>> +
>>  static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
>>  {
>>  	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
>> @@ -1317,6 +1326,8 @@ static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
>>  	dw_pcie_remove_capability(pcie->pci, PCI_CAP_ID_MSIX);
>>  	dw_pcie_remove_ext_capability(pcie->pci, PCI_EXT_CAP_ID_DPC);
>>  
>> +	qcom_pcie_configure_ports(pcie);
>> +
>>  	qcom_pcie_perst_deassert(pcie);
>>  
>>  	if (pcie->cfg->ops->config_sid) {
>> @@ -1759,6 +1770,9 @@ static int qcom_pcie_parse_port(struct qcom_pcie *pcie, struct device_node *node
>>  	if (ret)
>>  		return ret;
>>  
>> +	/* TODO: Need to move to dwc once multi root port support is added.  */
> s/dwc/DWC core
>
> s/root port/Root Port
>
> - Mani
>