Re: [PATCH] PCI: Do not enable async suspend for JMicron chips

[Aaron Lu <aaron.lu@intel.com>]

On 11/05/2014 09:07 AM, Chuansheng Liu wrote:
> The JMicron chip 361/363/368 contains one SATA controller and
> one PATA controller, they are brother-relation ship in PCI tree,
> but for powering on these both controller, we must follow the
> sequence one by one, otherwise one of them can not be powered on
> successfully.
> 
> So here we disable the async suspend method for Jmicron chip.
>

Place the buglink here?

  Buglink: https://bugzilla.kernel.org/show_bug.cgi?id=84861
  Buglink: https://bugzilla.kernel.org/show_bug.cgi?id=81551
> Cc: stable@vger.kernel.org # 3.15+
> Signed-off-by: Chuansheng Liu <chuansheng.liu@intel.com>

Patch looks good to me, thanks for fixing this!

-Aaron

> ---
>  drivers/pci/pci.c |   12 +++++++++++-
>  1 file changed, 11 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> index 625a4ac..53128f0 100644
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -2046,7 +2046,17 @@ void pci_pm_init(struct pci_dev *dev)
>  	pm_runtime_forbid(&dev->dev);
>  	pm_runtime_set_active(&dev->dev);
>  	pm_runtime_enable(&dev->dev);
> -	device_enable_async_suspend(&dev->dev);
> +
> +	/*
> +	 * The JMicron chip 361/363/368 contains one SATA controller and
> +	 * one PATA controller, they are brother-relation ship in PCI tree,
> +	 * but for powering on these both controller, we must follow the
> +	 * sequence one by one, otherwise one of them can not be powered on
> +	 * successfully, so here we disable the async suspend method for
> +	 * Jmicron chip.
> +	 */
> +	if (dev->vendor != PCI_VENDOR_ID_JMICRON)
> +		device_enable_async_suspend(&dev->dev);
>  	dev->wakeup_prepared = false;
>  
>  	dev->pm_cap = 0;
>