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From: Yijing Wang <wangyijing@huawei.com>
To: Jiang Liu <jiang.liu@linux.intel.com>,
	Marc Zyngier <marc.zyngier@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>,
	"grant.likely@linaro.org" <grant.likely@linaro.org>,
	Yingjoe Chen <yingjoe.chen@mediatek.com>,
	"Borislav Petkov" <bp@alien8.de>,
	"H. Peter Anvin" <hpa@zytor.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Tony Luck <tony.luck@intel.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [Patch V1 0/6] Refine generic/PCI MSI irqodmian interfaces
Date: Fri, 14 Nov 2014 09:09:06 +0800	[thread overview]
Message-ID: <54655632.2040209@huawei.com> (raw)
In-Reply-To: <54654C10.2040102@linux.intel.com>

On 2014/11/14 8:25, Jiang Liu wrote:
> On 2014/11/14 5:00, Marc Zyngier wrote:
>> On 13/11/14 11:43, Jiang Liu wrote:
>>> This patch set is based on tip/irq/irqdomain and tries to refine
>>> interfaces to support irqdomain for generic MSI and PCI MSI.
>>>
>>> With this patch set applied, the generic MSI and PCI MSI interfaces
>>> are much easier to use. For extreme case, you only need to define
>>> a "struct msi_domain_info" and don't need to implement any callbacks,
>>> just using the default callbacks is OK:)
>>>
>>> This patch set is also a preparation for:
>>> 1) Kill all weak functions in drivers/pci/msi.c
>>> 2) Implement support for non-PCI-compliant MSI device
>>
>> I've rebased (once more!) the GICv3 ITS driver on top of this, and this
>> is definitely a major improvement. This is basically the first version
>> I can use without having to hack into the core code (apart from the
>> couple of nits I've mentioned earlier).
> Sorry for the rebasing, but I hope it worthy rebasing:)
> 
>>
>> Now, Thomas' idea of putting the irq_domain close to the bus is very
>> appealing, and I've tweaked an earlier patch in order to do this:
> I feel that's the right direction. There are other threads discussing
> associating an MSI controller structure with each PCI bus (at least
> root bus).
> http://www.spinics.net/lists/arm-kernel/msg376328.html

Associate the irq domain and PCI bus is not necessary, because all PCI buses under same host bridge
always share same MSI chip/irq domain, we only need associate them and pci host bridge.
I'm refactoring the pci_host_bridge, make it be a generic one, rip out of the pci root bus
creation, so we could put the irq domain and pci domain etc.. in it. Finally, we could
eliminate lots platform arch functions. I will post it out within one week.

Thanks!
Yijing.

> Regards!
> Gerry
> 
> .
> 


-- 
Thanks!
Yijing


  reply	other threads:[~2014-11-14  1:10 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-13 11:43 [Patch V1 0/6] Refine generic/PCI MSI irqodmian interfaces Jiang Liu
2014-11-13 11:43 ` [Patch V1 1/6] PCI, MSI: Fix errors caused by commit e5f1a59c4e12 Jiang Liu
2014-11-13 11:43 ` [Patch V1 2/6] PCI, MSI: Introduce helpers to hide struct msi_desc implemenation details Jiang Liu
2014-11-13 11:43 ` [Patch V1 3/6] genirq: Introduce msi_domain_{alloc|free}_irqs() Jiang Liu
2014-11-13 20:23   ` Marc Zyngier
2014-11-14  0:18     ` Jiang Liu
2014-11-13 11:43 ` [Patch V1 3/6] genirq: Introduce msi_irq_domain_{alloc|free}_irqs() Jiang Liu
2014-11-13 12:34   ` Yijing Wang
2014-11-13 12:41     ` Jiang Liu
2014-11-13 12:57       ` Yijing Wang
2014-11-13 11:43 ` [Patch V1 4/6] genirq: Provide default callbacks for msi_domain_ops Jiang Liu
2014-11-13 11:43 ` [Patch V1 5/6] PCI, MSI: Refine irqdomain interfaces to simplify its usage Jiang Liu
2014-11-13 11:43 ` [Patch V1 6/6] PCI, MSI: Provide mechanism to alloc/free MSI/MSIX interrupt from irqdomain Jiang Liu
2014-11-13 19:46   ` Marc Zyngier
2014-11-13 12:28 ` [Patch V1 0/6] Refine generic/PCI MSI irqodmian interfaces Yijing Wang
2014-11-13 12:39   ` Jiang Liu
2014-11-13 12:55     ` Yijing Wang
2014-11-13 13:03       ` Jiang Liu
2014-11-13 13:05       ` Jiang Liu
2014-11-13 21:00 ` Marc Zyngier
2014-11-13 21:11   ` Thomas Gleixner
2014-11-13 21:28     ` Marc Zyngier
2014-11-14 15:54       ` Jiang Liu
2014-11-14 16:13         ` Marc Zyngier
2014-11-14  0:25   ` Jiang Liu
2014-11-14  1:09     ` Yijing Wang [this message]
2014-11-14  1:22       ` Jiang Liu
2014-11-14  1:31       ` Thomas Gleixner
2014-11-14  1:39         ` Jiang Liu
2014-11-14 12:13           ` Thomas Gleixner
2014-11-14 14:11           ` Yijing Wang
2014-11-14 14:26             ` Jiang Liu
2014-11-14 15:16               ` Marc Zyngier
2014-11-14 15:25                 ` Jiang Liu
2014-11-14 16:03                   ` Marc Zyngier
2014-11-14 17:11                     ` Lucas Stach
2014-11-14  2:16         ` Yijing Wang

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