From: Marc Zyngier <marc.zyngier@arm.com>
To: David Daney <ddaney.cavm@gmail.com>,
linux-arm-kernel@lists.infradead.org,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>,
linux-pci@vger.kernel.org, Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>
Cc: Robert Richter <rrichter@cavium.com>,
linux-kernel@vger.kernel.org,
David Daney <david.daney@cavium.com>
Subject: Re: [PATCH 4/5] irqchip: gic-v3: Add gic_get_irq_domain() to get the irqdomain of the GIC.
Date: Wed, 15 Jul 2015 18:12:31 +0100 [thread overview]
Message-ID: <55A6947F.8070903@arm.com> (raw)
In-Reply-To: <1436979285-8177-5-git-send-email-ddaney.cavm@gmail.com>
On 15/07/15 17:54, David Daney wrote:
> From: David Daney <david.daney@cavium.com>
>
> Needed to map SPI interrupt sources.
>
> Signed-off-by: David Daney <david.daney@cavium.com>
> ---
> drivers/irqchip/irq-gic-v3.c | 5 +++++
> include/linux/irqchip/arm-gic-v3.h | 1 +
> 2 files changed, 6 insertions(+)
>
> diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
> index c52f7ba..0019fed 100644
> --- a/drivers/irqchip/irq-gic-v3.c
> +++ b/drivers/irqchip/irq-gic-v3.c
> @@ -58,6 +58,11 @@ static struct gic_chip_data gic_data __read_mostly;
> /* Our default, arbitrary priority value. Linux only uses one anyway. */
> #define DEFAULT_PMR_VALUE 0xf0
>
> +struct irq_domain *gic_get_irq_domain(void)
> +{
> + return gic_data.domain;
> +}
> +
> static inline unsigned int gic_irq(struct irq_data *d)
> {
> return d->hwirq;
> diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h
> index 18e3757..5992224 100644
> --- a/include/linux/irqchip/arm-gic-v3.h
> +++ b/include/linux/irqchip/arm-gic-v3.h
> @@ -391,6 +391,7 @@ int its_init(struct device_node *node, struct rdists *rdists,
>
> typedef u32 (*its_pci_requester_id_t)(struct pci_dev *, u16);
> void set_its_pci_requester_id(its_pci_requester_id_t fn);
> +struct irq_domain *gic_get_irq_domain(void);
> #endif
>
> #endif
>
Hmmmffff... You need the domain for SPIs??
What is wrong with putting these interrupts in your device tree?
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2015-07-15 17:12 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-15 16:54 [PATCH 0/5] arm64, pci: Add ECAM/PCIe support for Cavium ThunderX David Daney
2015-07-15 16:54 ` [PATCH 1/5] pci: Add is_pcierc element to struct pci_bus David Daney
2015-07-15 16:54 ` [PATCH 2/5] gic-its: Allow pci_requester_id to be overridden David Daney
2015-07-15 17:30 ` Marc Zyngier
2015-08-20 14:11 ` Pavel Fedin
2015-08-20 15:23 ` David Daney
2015-08-25 11:01 ` Pavel Fedin
2015-07-15 16:54 ` [PATCH 3/5] arm64, pci: Allow RC drivers to supply pcibios_add_device() implementation David Daney
2015-07-16 9:04 ` Lorenzo Pieralisi
2015-07-16 17:00 ` David Daney
2015-07-17 11:00 ` Lorenzo Pieralisi
2015-07-17 16:38 ` David Daney
2015-07-17 17:15 ` Mark Rutland
2015-07-15 16:54 ` [PATCH 4/5] irqchip: gic-v3: Add gic_get_irq_domain() to get the irqdomain of the GIC David Daney
2015-07-15 17:12 ` Marc Zyngier [this message]
2015-07-15 18:57 ` David Daney
2015-07-16 7:38 ` Marc Zyngier
2015-07-16 16:50 ` David Daney
2015-07-16 17:09 ` Marc Zyngier
2015-07-16 17:14 ` David Daney
2015-07-16 17:32 ` Marc Zyngier
2015-07-17 6:45 ` Marc Zyngier
2015-07-15 16:54 ` [PATCH 5/5] PCI: Add host drivers for Cavium ThunderX processors David Daney
2015-07-15 17:44 ` Mark Rutland
2015-07-15 17:48 ` Marc Zyngier
2015-07-16 8:31 ` Paul Bolle
2015-07-16 16:52 ` David Daney
2015-07-16 13:06 ` Lorenzo Pieralisi
2015-07-17 12:12 ` Arnd Bergmann
2015-07-15 17:07 ` [PATCH 0/5] arm64, pci: Add ECAM/PCIe support for Cavium ThunderX Mark Rutland
2015-07-15 17:29 ` Will Deacon
2015-07-16 17:25 ` Thomas Gleixner
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