From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Johan Hovold <johan+linaro@kernel.org>,
Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Kishon Vijay Abraham I <kishon@ti.com>,
Vinod Koul <vkoul@kernel.org>, Stephen Boyd <swboyd@chromium.org>
Cc: "Rob Herring" <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Stanimir Varbanov" <svarbanov@mm-sol.com>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Prasad Malisetty" <quic_pmaliset@quicinc.com>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
linux-phy@lists.infradead.org
Subject: Re: [PATCH RFC 2/5] arm64: dts: qcom: sc7280: move pipe mux handling to phy
Date: Thu, 21 Apr 2022 13:59:04 +0300 [thread overview]
Message-ID: <55d6e32b-9cf4-384c-1036-1adfb867ece8@linaro.org> (raw)
In-Reply-To: <20220421102041.17345-3-johan+linaro@kernel.org>
On 21/04/2022 13:20, Johan Hovold wrote:
> The QMP PHY pipe clock remuxing is part of the PHY, which is both the
> producer and the consumer of the pipe clock.
>
> Update the PCIe controller and PHY node to reflect the new binding.
>
> Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
> ---
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 18 ++++++------------
> 1 file changed, 6 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index c07765df9303..b3a9630262dc 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -1837,11 +1837,7 @@ pcie1: pci@1c08000 {
> <0 0 0 3 &intc 0 0 0 438 IRQ_TYPE_LEVEL_HIGH>,
> <0 0 0 4 &intc 0 0 0 439 IRQ_TYPE_LEVEL_HIGH>;
>
> - clocks = <&gcc GCC_PCIE_1_PIPE_CLK>,
> - <&gcc GCC_PCIE_1_PIPE_CLK_SRC>,
> - <&pcie1_lane 0>,
> - <&rpmhcc RPMH_CXO_CLK>,
> - <&gcc GCC_PCIE_1_AUX_CLK>,
> + clocks = <&gcc GCC_PCIE_1_AUX_CLK>,
> <&gcc GCC_PCIE_1_CFG_AHB_CLK>,
> <&gcc GCC_PCIE_1_MSTR_AXI_CLK>,
> <&gcc GCC_PCIE_1_SLV_AXI_CLK>,
> @@ -1849,11 +1845,7 @@ pcie1: pci@1c08000 {
> <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>,
> <&gcc GCC_DDRSS_PCIE_SF_CLK>;
>
> - clock-names = "pipe",
> - "pipe_mux",
> - "phy_pipe",
> - "ref",
> - "aux",
> + clock-names = "aux",
> "cfg",
> "bus_master",
> "bus_slave",
> @@ -1910,8 +1902,10 @@ pcie1_lane: lanes@1c0e200 {
> <0 0x01c0e600 0 0x170>,
> <0 0x01c0e800 0 0x200>,
> <0 0x01c0ee00 0 0xf4>;
> - clocks = <&gcc GCC_PCIE_1_PIPE_CLK>;
> - clock-names = "pipe0";
> + clocks = <&gcc GCC_PCIE_1_PIPE_CLK>,
> + <&gcc GCC_PCIE_1_PIPE_CLK_SRC>,
> + <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "pipe0", "mux", "ref";
This will not be compatible with earlier DTB files, which was a problem
up to now.
>
> #phy-cells = <0>;
> #clock-cells = <1>;
--
With best wishes
Dmitry
next prev parent reply other threads:[~2022-04-21 10:59 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-21 10:20 [PATCH RFC 0/5] phy: qcom-qmp: add support for pipe clock muxing Johan Hovold
2022-04-21 10:20 ` [PATCH RFC 1/5] " Johan Hovold
2022-04-21 11:08 ` Dmitry Baryshkov
2022-04-22 10:20 ` Johan Hovold
2022-04-22 10:35 ` Dmitry Baryshkov
2022-04-22 11:22 ` Johan Hovold
2022-04-28 16:15 ` Rob Herring
2022-04-21 11:36 ` Dmitry Baryshkov
2022-04-22 10:41 ` Johan Hovold
2022-04-28 13:11 ` Bjorn Andersson
2022-04-29 6:53 ` Johan Hovold
2022-04-21 10:20 ` [PATCH RFC 2/5] arm64: dts: qcom: sc7280: move pipe mux handling to phy Johan Hovold
2022-04-21 10:59 ` Dmitry Baryshkov [this message]
2022-04-22 10:07 ` Johan Hovold
2022-04-22 10:36 ` Dmitry Baryshkov
2022-04-21 10:20 ` [PATCH RFC 3/5] PCI: qcom: Remove unnecessary pipe_clk handling Johan Hovold
2022-04-21 10:20 ` [PATCH RFC 4/5] PCI: qcom: Drop pipe clock muxing Johan Hovold
2022-04-21 10:20 ` [PATCH RFC 5/5] PCI: qcom: Drop unused post-init callbacks Johan Hovold
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