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From: Zhou Wang <wangzhou1@hisilicon.com>
To: Arnd Bergmann <arnd@arndb.de>
Cc: Gabriele Paoloni <gabriele.paoloni@huawei.com>,
	Bjorn Helgaas <helgaas@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	"jingoohan1@gmail.com" <jingoohan1@gmail.com>,
	"pratyush.anand@gmail.com" <pratyush.anand@gmail.com>,
	"linux@arm.linux.org.uk" <linux@arm.linux.org.uk>,
	"thomas.petazzoni@free-electrons.com"
	<thomas.petazzoni@free-electrons.com>,
	"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
	"james.morse@arm.com" <james.morse@arm.com>,
	"Liviu.Dudau@arm.com" <Liviu.Dudau@arm.com>,
	"jason@lakedaemon.net" <jason@lakedaemon.net>,
	"robh@kernel.org" <robh@kernel.org>,
	"gabriel.fernandez@linaro.org" <gabriel.fernandez@linaro.org>,
	"Minghuan.Lian@freescale.com" <Minghuan.Lian@freescale.com>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	zhangjukuo <zhangjukuo@huawei.com>,
	qiuzhenfa <qiuzhenfa@hisilicon.com>,
	"liudongdong (C)" <liudongdong3@huawei.com>,
	qiujiang <qiujiang@huawei.com>,
	"xuwei (O)" <xuwei5@hisilicon.com>,
	"Liguozhu (Kenneth)" <liguozhu@hisilicon.com>,
	"Wangkefeng (Kevin)" <wangkefeng.wang@huawei.com>,
	Rob Herring <robh+dt@kernel.org>
Subject: Re: [PATCH v10 4/6] PCI: hisi: Add PCIe host support for HiSilicon SoC Hip05
Date: Wed, 14 Oct 2015 17:44:11 +0800	[thread overview]
Message-ID: <561E23EB.7050504@hisilicon.com> (raw)
In-Reply-To: <30775300.COZ4nEMWXC@wuerfel>

On 2015/10/14 17:06, Arnd Bergmann wrote:
> On Wednesday 14 October 2015 16:59:03 Zhou Wang wrote:
>>
>> Hi Arnd,
>>
>> In Hip05 PCIe host, it uses GITS_TRANSLATER's address to get TLP package
>> which contains MSI address and MSI data, and then combine BDF and MSI data
>> to a 32 bit data which will be writen to GITS_TRANSLATER register of ITS.
>>
>> I think maybe this is a defect of our PCIe controller.
> 
> I'd consider it a bug in the firmware if this is not set up correctly
> before boot.
> 
>>> I don't think what you do here is safe because the 'reg' property
>>> of the MSI controller might point to the address that is used for
>>> the message directly.
>>
>> I see your point, however we must get address of GITS_TRANSLATER and
>> set it to PCIe host. How about adding necessary comments here?
> 
> This seems to just be static setup that should be done before Linux
> is even loaded. Any reason you can't do it that way?
>

There are some ITSs in Hip05-D02 platform, in fact, we can use any of them
as a msi-controller,  which we can configure in dts. I am afraid that
hard-setting the value in BIOS would lead to restrictions in terms of flexibility,
as with the current implementation the same BIOS-driver can fit different
DTS structures.

Regards,
Zhou

> 	Arnd
> 
> .
> 



  reply	other threads:[~2015-10-14  9:44 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-10  2:59 [PATCH v10 0/6] PCI: hisi: Add PCIe host support for HiSilicon SoC Hip05 Zhou Wang
2015-10-10  2:59 ` [PATCH v10 1/6] PCI: designware: move calculation of bus addresses to DRA7xx Zhou Wang
2015-10-10  2:59 ` [PATCH v10 2/6] ARM/PCI: remove align_resource in pci_sys_data Zhou Wang
2015-10-10  2:59 ` [PATCH v10 3/6] PCI: designware: Add ARM64 support Zhou Wang
2015-10-10  2:59 ` [PATCH v10 4/6] PCI: hisi: Add PCIe host support for HiSilicon SoC Hip05 Zhou Wang
2015-10-12 21:35   ` Bjorn Helgaas
2015-10-13  6:33     ` Zhou Wang
2015-10-13  6:58       ` Gabriele Paoloni
2015-10-13 11:18         ` Arnd Bergmann
2015-10-14  8:34           ` Gabriele Paoloni
2015-10-14  9:04             ` Arnd Bergmann
2015-10-14  9:31               ` Gabriele Paoloni
2015-10-14  9:42                 ` Arnd Bergmann
2015-10-14  9:56                   ` Gabriele Paoloni
2015-10-13 11:12     ` Arnd Bergmann
2015-10-13 14:49       ` Gabriele Paoloni
2015-10-13 15:00         ` Arnd Bergmann
2015-10-14  8:59           ` Zhou Wang
2015-10-14  9:06             ` Arnd Bergmann
2015-10-14  9:44               ` Zhou Wang [this message]
2015-10-14 21:56                 ` Arnd Bergmann
2015-10-15  8:33                   ` Zhou Wang
2015-10-10  2:59 ` [PATCH v10 5/6] Documentation: DT: Add HiSilicon PCIe host binding Zhou Wang
2015-10-10  2:59 ` [PATCH v10 6/6] MAINTAINERS: Add pcie-hisi maintainer Zhou Wang

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