From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com ([217.140.101.70]:38858 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932422AbbLGRLn (ORCPT ); Mon, 7 Dec 2015 12:11:43 -0500 Message-ID: <5665BDC8.7060206@arm.com> Date: Mon, 07 Dec 2015 17:11:36 +0000 From: Marc Zyngier MIME-Version: 1.0 To: Bharat Kumar Gogada , robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, michals@xilinx.com, sorenb@xilinx.com, bhelgaas@google.com, arnd@arndb.de, tinamdar@apm.com, treding@nvidia.com, rjui@broadcom.com, Minghuan.Lian@freescale.com, m-karicheri2@ti.com, hauke@hauke-m.de, dhdang@apm.com, sbranden@broadcom.com CC: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, Bharat Kumar Gogada , Ravi Kiran Gummaluri Subject: Re: [PATCH v11] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller References: <1448798633-12697-1-git-send-email-bharatku@xilinx.com> In-Reply-To: <1448798633-12697-1-git-send-email-bharatku@xilinx.com> Content-Type: text/plain; charset=windows-1252 Sender: linux-pci-owner@vger.kernel.org List-ID: On 29/11/15 12:03, Bharat Kumar Gogada wrote: > Adding PCIe Root Port driver for Xilinx PCIe NWL bridge IP. > > Signed-off-by: Bharat Kumar Gogada > Signed-off-by: Ravi Kiran Gummaluri > Acked-by: Rob Herring I don't have much to add to this, so FWIW: Reviewed-by: Marc Zyngier M. -- Jazz is not dead. It just smells funny...