Linux PCI subsystem development
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From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>,
	andersson@kernel.org, mturquette@baylibre.com, sboyd@kernel.org,
	robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
	lpieralisi@kernel.org, kw@linux.com,
	manivannan.sadhasivam@linaro.org, bhelgaas@google.com,
	konradybcio@kernel.org, linux-arm-msm@vger.kernel.org,
	linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org
Cc: quic_srichara@quicinc.com, quic_varada@quicinc.com
Subject: Re: [PATCH v3 2/4] dt-bindings: clock: update interconnect cells for ipq5424
Date: Tue, 28 Jan 2025 12:26:32 +0100	[thread overview]
Message-ID: <56dfc864-9a7e-4954-a7f6-91ff6b6d05ec@oss.qualcomm.com> (raw)
In-Reply-To: <20250125035920.2651972-3-quic_mmanikan@quicinc.com>

On 25.01.2025 4:59 AM, Manikanta Mylavarapu wrote:
> Interconnect cells differ between the IPQ5332 and IPQ5424.
> Therefore, update the interconnect cells according to the SoC.
> 
> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
> ---
>  .../devicetree/bindings/clock/qcom,ipq5332-gcc.yaml       | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml
> index 1230183fc0a9..fac7922d2473 100644
> --- a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml
> +++ b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml
> @@ -35,8 +35,6 @@ properties:
>        - description: PCIE 2-lane PHY3 pipe clock source
>  
>    '#power-domain-cells': false
> -  '#interconnect-cells':
> -    const: 1
>  
>  required:
>    - compatible
> @@ -54,6 +52,9 @@ allOf:
>          clocks:
>            maxItems: 5
>  
> +        '#interconnect-cells':
> +          const: 1
> +
>    - if:
>        properties:
>          compatible:
> @@ -65,6 +66,9 @@ allOf:
>            minItems: 7
>            maxItems: 7
>  
> +        '#interconnect-cells':
> +          const: 2

Please apply some criticism to the review comments you receive.. this only
makes sense for platforms using icc-rpm or icc-rpmh.

Since this driver registers an interconnect provider through icc_clk APIs,
it explicitly uses a simple, onecell translation function to .get the nodes

Please drop this patch

Konrad

  parent reply	other threads:[~2025-01-28 11:26 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-25  3:59 [PATCH v3 0/4] Add PCIe support for IPQ5424 Manikanta Mylavarapu
2025-01-25  3:59 ` [PATCH v3 1/4] dt-bindings: PCI: qcom: add global interrupt for ipq5424 Manikanta Mylavarapu
2025-01-27  7:25   ` Krzysztof Kozlowski
2025-01-28  7:00     ` Manikanta Mylavarapu
2025-01-28  7:30     ` Krzysztof Kozlowski
2025-01-25  3:59 ` [PATCH v3 2/4] dt-bindings: clock: update interconnect cells " Manikanta Mylavarapu
2025-01-27  7:27   ` Krzysztof Kozlowski
2025-01-28  7:12     ` Manikanta Mylavarapu
2025-01-28 11:26   ` Konrad Dybcio [this message]
2025-01-30  6:56     ` Manikanta Mylavarapu
2025-01-25  3:59 ` [PATCH v3 3/4] arm64: dts: qcom: ipq5424: Add PCIe PHYs and controller nodes Manikanta Mylavarapu
2025-01-28 11:38   ` Konrad Dybcio
2025-01-30  6:57     ` Manikanta Mylavarapu
2025-01-25  3:59 ` [PATCH v3 4/4] arm64: dts: qcom: ipq5424: Enable PCIe PHYs and controllers Manikanta Mylavarapu
2025-01-28 11:39   ` Konrad Dybcio
2025-01-29 10:11     ` Manikanta Mylavarapu

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