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From: David Daney <ddaney.cavm@gmail.com>
To: Corentin LABBE <clabbe.montjoie@gmail.com>
Cc: herbert@gondor.apana.org.au, David.Daney@cavium.com,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	Ananth.Jasty@cavium.com, linux-crypto@vger.kernel.org,
	Omer Khaliq <okhaliq@caviumnetworks.com>,
	mpm@selenic.com, bhelgaas@google.com,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 2/2] HWRNG: thunderx: Add Cavium HWRNG driver for ThunderX SoC.
Date: Wed, 24 Aug 2016 16:07:25 -0700	[thread overview]
Message-ID: <57BE28AD.5080607@gmail.com> (raw)
In-Reply-To: <874d0bce-cf9b-8772-5af4-ec3844b3b255@gmail.com>

On 08/23/2016 10:46 PM, Corentin LABBE wrote:
> Hello
>
>> +/* Read data from the RNG unit */
>> +static int cavium_rng_read(struct hwrng *rng, void *dat, size_t max, bool wait)
>> +{
>> +	struct cavium_rng *p = container_of(rng, struct cavium_rng, ops);
>> +	unsigned int size = max;
>> +
>> +	while (size >= 8) {
>> +		*((u64 *)dat) = readq(p->result);
>> +		size -= 8;
>> +		dat += 8;
>> +	}
>
> I think you could use readsq()
> This will increase throughput

If you look at the implementation of readsq(), you will see that it is a 
similar loop.  Since the overhead is primarily I/O latency from the RNG 
hardware, the throughput cannot really be changed with micro 
optimizations to this simple loop.

Also, on big-endian kernels, it appears that a loop of readq() and 
readsq() will give different results as readq will byte swap the result 
and readsq does not.  Since this is a RNG, the byte swapping is not 
important, but it is a difference.

Because of this, I think it should be acceptable to stick with the loop 
we currently have.

If the hwrng maintainers want to change the loop, to a readsq(), we 
might investigate this more.

Thanks,
David Daney



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  reply	other threads:[~2016-08-24 23:07 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-23 23:27 [PATCH v2 0/2] HWRNG/PCI: Add driver for Cavium Thunder RNG Omer Khaliq
2016-08-23 23:27 ` [PATCH v2 1/2] PCI: quirk fixup for cavium invalid sriov link value Omer Khaliq
2016-08-24 16:47   ` Bjorn Helgaas
2016-08-23 23:27 ` [PATCH v2 2/2] HWRNG: thunderx: Add Cavium HWRNG driver for ThunderX SoC Omer Khaliq
2016-08-24  5:46   ` Corentin LABBE
2016-08-24 23:07     ` David Daney [this message]
2016-08-31 15:17 ` [PATCH v2 0/2] HWRNG/PCI: Add driver for Cavium Thunder RNG Herbert Xu

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