* [PATCH v2 1/6] PCI: keystone: Add local struct device pointers
2016-10-12 13:53 [PATCH v2 0/6] PCI: keystone: Cleanups Bjorn Helgaas
@ 2016-10-12 13:53 ` Bjorn Helgaas
2016-10-12 13:53 ` [PATCH v2 2/6] PCI: keystone: Use generic DesignWare accessors Bjorn Helgaas
` (5 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Bjorn Helgaas @ 2016-10-12 13:53 UTC (permalink / raw)
To: Murali Karicheri; +Cc: linux-pci
Use a local "struct device *dev" for brevity and consistency with other
drivers. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/pci/host/pci-keystone-dw.c | 19 +++++++++++--------
drivers/pci/host/pci-keystone.c | 23 +++++++++++++----------
2 files changed, 24 insertions(+), 18 deletions(-)
diff --git a/drivers/pci/host/pci-keystone-dw.c b/drivers/pci/host/pci-keystone-dw.c
index 4151509..e2c04d1 100644
--- a/drivers/pci/host/pci-keystone-dw.c
+++ b/drivers/pci/host/pci-keystone-dw.c
@@ -91,6 +91,7 @@ phys_addr_t ks_dw_pcie_get_msi_addr(struct pcie_port *pp)
void ks_dw_pcie_handle_msi_irq(struct keystone_pcie *ks_pcie, int offset)
{
struct pcie_port *pp = &ks_pcie->pp;
+ struct device *dev = pp->dev;
u32 pending, vector;
int src, virq;
@@ -104,7 +105,7 @@ void ks_dw_pcie_handle_msi_irq(struct keystone_pcie *ks_pcie, int offset)
if (BIT(src) & pending) {
vector = offset + (src << 3);
virq = irq_linear_revmap(pp->irq_domain, vector);
- dev_dbg(pp->dev, "irq: bit %d, vector %d, virq %d\n",
+ dev_dbg(dev, "irq: bit %d, vector %d, virq %d\n",
src, vector, virq);
generic_handle_irq(virq);
}
@@ -215,6 +216,7 @@ static const struct irq_domain_ops ks_dw_pcie_msi_domain_ops = {
int ks_dw_pcie_msi_host_init(struct pcie_port *pp, struct msi_controller *chip)
{
struct keystone_pcie *ks_pcie = to_keystone_pcie(pp);
+ struct device *dev = pp->dev;
int i;
pp->irq_domain = irq_domain_add_linear(ks_pcie->msi_intc_np,
@@ -222,7 +224,7 @@ int ks_dw_pcie_msi_host_init(struct pcie_port *pp, struct msi_controller *chip)
&ks_dw_pcie_msi_domain_ops,
chip);
if (!pp->irq_domain) {
- dev_err(pp->dev, "irq domain init failed\n");
+ dev_err(dev, "irq domain init failed\n");
return -ENXIO;
}
@@ -243,6 +245,7 @@ void ks_dw_pcie_enable_legacy_irqs(struct keystone_pcie *ks_pcie)
void ks_dw_pcie_handle_legacy_irq(struct keystone_pcie *ks_pcie, int offset)
{
struct pcie_port *pp = &ks_pcie->pp;
+ struct device *dev = pp->dev;
u32 pending;
int virq;
@@ -250,8 +253,7 @@ void ks_dw_pcie_handle_legacy_irq(struct keystone_pcie *ks_pcie, int offset)
if (BIT(0) & pending) {
virq = irq_linear_revmap(ks_pcie->legacy_irq_domain, offset);
- dev_dbg(pp->dev, ": irq: irq_offset %d, virq %d\n", offset,
- virq);
+ dev_dbg(dev, ": irq: irq_offset %d, virq %d\n", offset, virq);
generic_handle_irq(virq);
}
@@ -506,12 +508,13 @@ int __init ks_dw_pcie_host_init(struct keystone_pcie *ks_pcie,
struct device_node *msi_intc_np)
{
struct pcie_port *pp = &ks_pcie->pp;
- struct platform_device *pdev = to_platform_device(pp->dev);
+ struct device *dev = pp->dev;
+ struct platform_device *pdev = to_platform_device(dev);
struct resource *res;
/* Index 0 is the config reg. space address */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- pp->dbi_base = devm_ioremap_resource(pp->dev, res);
+ pp->dbi_base = devm_ioremap_resource(dev, res);
if (IS_ERR(pp->dbi_base))
return PTR_ERR(pp->dbi_base);
@@ -524,7 +527,7 @@ int __init ks_dw_pcie_host_init(struct keystone_pcie *ks_pcie,
/* Index 1 is the application reg. space address */
res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
- ks_pcie->va_app_base = devm_ioremap_resource(pp->dev, res);
+ ks_pcie->va_app_base = devm_ioremap_resource(dev, res);
if (IS_ERR(ks_pcie->va_app_base))
return PTR_ERR(ks_pcie->va_app_base);
@@ -537,7 +540,7 @@ int __init ks_dw_pcie_host_init(struct keystone_pcie *ks_pcie,
&ks_dw_pcie_legacy_irq_domain_ops,
NULL);
if (!ks_pcie->legacy_irq_domain) {
- dev_err(pp->dev, "Failed to add irq domain for legacy irqs\n");
+ dev_err(dev, "Failed to add irq domain for legacy irqs\n");
return -EINVAL;
}
diff --git a/drivers/pci/host/pci-keystone.c b/drivers/pci/host/pci-keystone.c
index 82b461b..9dfac0b 100644
--- a/drivers/pci/host/pci-keystone.c
+++ b/drivers/pci/host/pci-keystone.c
@@ -89,12 +89,13 @@ DECLARE_PCI_FIXUP_ENABLE(PCI_ANY_ID, PCI_ANY_ID, quirk_limit_mrrs);
static int ks_pcie_establish_link(struct keystone_pcie *ks_pcie)
{
struct pcie_port *pp = &ks_pcie->pp;
+ struct device *dev = pp->dev;
unsigned int retries;
dw_pcie_setup_rc(pp);
if (dw_pcie_link_up(pp)) {
- dev_err(pp->dev, "Link already up\n");
+ dev_err(dev, "Link already up\n");
return 0;
}
@@ -105,7 +106,7 @@ static int ks_pcie_establish_link(struct keystone_pcie *ks_pcie)
return 0;
}
- dev_err(pp->dev, "phy link never came up\n");
+ dev_err(dev, "phy link never came up\n");
return -ETIMEDOUT;
}
@@ -115,9 +116,10 @@ static void ks_pcie_msi_irq_handler(struct irq_desc *desc)
struct keystone_pcie *ks_pcie = irq_desc_get_handler_data(desc);
u32 offset = irq - ks_pcie->msi_host_irqs[0];
struct pcie_port *pp = &ks_pcie->pp;
+ struct device *dev = pp->dev;
struct irq_chip *chip = irq_desc_get_chip(desc);
- dev_dbg(pp->dev, "%s, irq %d\n", __func__, irq);
+ dev_dbg(dev, "%s, irq %d\n", __func__, irq);
/*
* The chained irq handler installation would have replaced normal
@@ -142,10 +144,11 @@ static void ks_pcie_legacy_irq_handler(struct irq_desc *desc)
unsigned int irq = irq_desc_get_irq(desc);
struct keystone_pcie *ks_pcie = irq_desc_get_handler_data(desc);
struct pcie_port *pp = &ks_pcie->pp;
+ struct device *dev = pp->dev;
u32 irq_offset = irq - ks_pcie->legacy_host_irqs[0];
struct irq_chip *chip = irq_desc_get_chip(desc);
- dev_dbg(pp->dev, ": Handling legacy irq %d\n", irq);
+ dev_dbg(dev, ": Handling legacy irq %d\n", irq);
/*
* The chained irq handler installation would have replaced normal
@@ -310,6 +313,7 @@ static int __init ks_add_pcie_port(struct keystone_pcie *ks_pcie,
struct platform_device *pdev)
{
struct pcie_port *pp = &ks_pcie->pp;
+ struct device *dev = pp->dev;
int ret;
ret = ks_pcie_get_irq_controller_info(ks_pcie,
@@ -332,12 +336,12 @@ static int __init ks_add_pcie_port(struct keystone_pcie *ks_pcie,
*/
ks_pcie->error_irq = irq_of_parse_and_map(ks_pcie->np, 0);
if (ks_pcie->error_irq <= 0)
- dev_info(&pdev->dev, "no error IRQ defined\n");
+ dev_info(dev, "no error IRQ defined\n");
else {
ret = request_irq(ks_pcie->error_irq, pcie_err_irq_handler,
IRQF_SHARED, "pcie-error-irq", ks_pcie);
if (ret < 0) {
- dev_err(&pdev->dev, "failed to request error IRQ %d\n",
+ dev_err(dev, "failed to request error IRQ %d\n",
ks_pcie->error_irq);
return ret;
}
@@ -347,7 +351,7 @@ static int __init ks_add_pcie_port(struct keystone_pcie *ks_pcie,
pp->ops = &keystone_pcie_host_ops;
ret = ks_dw_pcie_host_init(ks_pcie, ks_pcie->msi_intc_np);
if (ret) {
- dev_err(&pdev->dev, "failed to initialize host\n");
+ dev_err(dev, "failed to initialize host\n");
return ret;
}
@@ -381,12 +385,12 @@ static int __init ks_pcie_probe(struct platform_device *pdev)
struct phy *phy;
int ret;
- ks_pcie = devm_kzalloc(&pdev->dev, sizeof(*ks_pcie),
- GFP_KERNEL);
+ ks_pcie = devm_kzalloc(dev, sizeof(*ks_pcie), GFP_KERNEL);
if (!ks_pcie)
return -ENOMEM;
pp = &ks_pcie->pp;
+ pp->dev = dev;
/* initialize SerDes Phy if present */
phy = devm_phy_get(dev, "pcie-phy");
@@ -408,7 +412,6 @@ static int __init ks_pcie_probe(struct platform_device *pdev)
devm_iounmap(dev, reg_p);
devm_release_mem_region(dev, res->start, resource_size(res));
- pp->dev = dev;
ks_pcie->np = dev->of_node;
platform_set_drvdata(pdev, ks_pcie);
ks_pcie->clk = devm_clk_get(dev, "pcie");
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 2/6] PCI: keystone: Use generic DesignWare accessors
2016-10-12 13:53 [PATCH v2 0/6] PCI: keystone: Cleanups Bjorn Helgaas
2016-10-12 13:53 ` [PATCH v2 1/6] PCI: keystone: Add local struct device pointers Bjorn Helgaas
@ 2016-10-12 13:53 ` Bjorn Helgaas
2016-10-12 13:53 ` [PATCH v2 3/6] PCI: keystone: Pass keystone_pcie, not address, to IRQ functions Bjorn Helgaas
` (4 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Bjorn Helgaas @ 2016-10-12 13:53 UTC (permalink / raw)
To: Murali Karicheri; +Cc: linux-pci
The dw_pcie_readl_rc() and dw_pcie_writel_rc() interfaces already add in
pp->dbi_base, so use those instead of doing it ourselves in the keystone
driver. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/pci/host/pci-keystone-dw.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/pci/host/pci-keystone-dw.c b/drivers/pci/host/pci-keystone-dw.c
index e2c04d1..ce97816 100644
--- a/drivers/pci/host/pci-keystone-dw.c
+++ b/drivers/pci/host/pci-keystone-dw.c
@@ -362,8 +362,8 @@ void ks_dw_pcie_setup_rc_app_regs(struct keystone_pcie *ks_pcie)
/* Disable BARs for inbound access */
ks_dw_pcie_set_dbi_mode(ks_pcie->va_app_base);
- writel(0, pp->dbi_base + PCI_BASE_ADDRESS_0);
- writel(0, pp->dbi_base + PCI_BASE_ADDRESS_1);
+ dw_pcie_writel_rc(pp, PCI_BASE_ADDRESS_0, 0);
+ dw_pcie_writel_rc(pp, PCI_BASE_ADDRESS_1, 0);
ks_dw_pcie_clear_dbi_mode(ks_pcie->va_app_base);
/* Set outbound translation size per window division */
@@ -461,8 +461,8 @@ void ks_dw_pcie_v3_65_scan_bus(struct pcie_port *pp)
ks_dw_pcie_set_dbi_mode(ks_pcie->va_app_base);
/* Enable BAR0 */
- writel(1, pp->dbi_base + PCI_BASE_ADDRESS_0);
- writel(SZ_4K - 1, pp->dbi_base + PCI_BASE_ADDRESS_0);
+ dw_pcie_writel_rc(pp, PCI_BASE_ADDRESS_0, 1);
+ dw_pcie_writel_rc(pp, PCI_BASE_ADDRESS_0, SZ_4K - 1);
ks_dw_pcie_clear_dbi_mode(ks_pcie->va_app_base);
@@ -470,7 +470,7 @@ void ks_dw_pcie_v3_65_scan_bus(struct pcie_port *pp)
* For BAR0, just setting bus address for inbound writes (MSI) should
* be sufficient. Use physical address to avoid any conflicts.
*/
- writel(ks_pcie->app.start, pp->dbi_base + PCI_BASE_ADDRESS_0);
+ dw_pcie_writel_rc(pp, PCI_BASE_ADDRESS_0, ks_pcie->app.start);
}
/**
@@ -478,8 +478,9 @@ void ks_dw_pcie_v3_65_scan_bus(struct pcie_port *pp)
*/
int ks_dw_pcie_link_up(struct pcie_port *pp)
{
- u32 val = readl(pp->dbi_base + DEBUG0);
+ u32 val;
+ val = dw_pcie_readl_rc(pp, DEBUG0);
return (val & LTSSM_STATE_MASK) == LTSSM_STATE_L0;
}
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 3/6] PCI: keystone: Pass keystone_pcie, not address, to IRQ functions
2016-10-12 13:53 [PATCH v2 0/6] PCI: keystone: Cleanups Bjorn Helgaas
2016-10-12 13:53 ` [PATCH v2 1/6] PCI: keystone: Add local struct device pointers Bjorn Helgaas
2016-10-12 13:53 ` [PATCH v2 2/6] PCI: keystone: Use generic DesignWare accessors Bjorn Helgaas
@ 2016-10-12 13:53 ` Bjorn Helgaas
2016-10-12 13:53 ` [PATCH v2 4/6] PCI: keystone: Pass keystone_pcie, not va_app_base, to DBI functions Bjorn Helgaas
` (3 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Bjorn Helgaas @ 2016-10-12 13:53 UTC (permalink / raw)
To: Murali Karicheri; +Cc: linux-pci
Instead of passing the application register base to IRQ functions,
pass the struct keystone_pcie. This will allow them to use register
accessors. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/pci/host/pci-keystone-dw.c | 15 ++++++++-------
drivers/pci/host/pci-keystone.c | 5 ++---
drivers/pci/host/pci-keystone.h | 5 ++---
3 files changed, 12 insertions(+), 13 deletions(-)
diff --git a/drivers/pci/host/pci-keystone-dw.c b/drivers/pci/host/pci-keystone-dw.c
index ce97816..dae68a2 100644
--- a/drivers/pci/host/pci-keystone-dw.c
+++ b/drivers/pci/host/pci-keystone-dw.c
@@ -261,25 +261,26 @@ void ks_dw_pcie_handle_legacy_irq(struct keystone_pcie *ks_pcie, int offset)
writel(offset, ks_pcie->va_app_base + IRQ_EOI);
}
-void ks_dw_pcie_enable_error_irq(void __iomem *reg_base)
+void ks_dw_pcie_enable_error_irq(struct keystone_pcie *ks_pcie)
{
- writel(ERR_IRQ_ALL, reg_base + ERR_IRQ_ENABLE_SET);
+ writel(ERR_IRQ_ALL, ks_pcie->va_app_base + ERR_IRQ_ENABLE_SET);
}
-irqreturn_t ks_dw_pcie_handle_error_irq(struct device *dev,
- void __iomem *reg_base)
+irqreturn_t ks_dw_pcie_handle_error_irq(struct keystone_pcie *ks_pcie)
{
u32 status;
- status = readl(reg_base + ERR_IRQ_STATUS_RAW) & ERR_IRQ_ALL;
+ status = readl(ks_pcie->va_app_base + ERR_IRQ_STATUS_RAW) &
+ ERR_IRQ_ALL;
if (!status)
return IRQ_NONE;
if (status & ERR_FATAL_IRQ)
- dev_err(dev, "fatal error (status %#010x)\n", status);
+ dev_err(ks_pcie->pp.dev, "fatal error (status %#010x)\n",
+ status);
/* Ack the IRQ; status bits are RW1C */
- writel(status, reg_base + ERR_IRQ_STATUS);
+ writel(status, ks_pcie->va_app_base + ERR_IRQ_STATUS);
return IRQ_HANDLED;
}
diff --git a/drivers/pci/host/pci-keystone.c b/drivers/pci/host/pci-keystone.c
index 9dfac0b..043c19a 100644
--- a/drivers/pci/host/pci-keystone.c
+++ b/drivers/pci/host/pci-keystone.c
@@ -237,7 +237,7 @@ static void ks_pcie_setup_interrupts(struct keystone_pcie *ks_pcie)
}
if (ks_pcie->error_irq > 0)
- ks_dw_pcie_enable_error_irq(ks_pcie->va_app_base);
+ ks_dw_pcie_enable_error_irq(ks_pcie);
}
/*
@@ -305,8 +305,7 @@ static irqreturn_t pcie_err_irq_handler(int irq, void *priv)
{
struct keystone_pcie *ks_pcie = priv;
- return ks_dw_pcie_handle_error_irq(ks_pcie->pp.dev,
- ks_pcie->va_app_base);
+ return ks_dw_pcie_handle_error_irq(ks_pcie);
}
static int __init ks_add_pcie_port(struct keystone_pcie *ks_pcie,
diff --git a/drivers/pci/host/pci-keystone.h b/drivers/pci/host/pci-keystone.h
index a5b0cb2..fe2f741 100644
--- a/drivers/pci/host/pci-keystone.h
+++ b/drivers/pci/host/pci-keystone.h
@@ -45,9 +45,8 @@ phys_addr_t ks_dw_pcie_get_msi_addr(struct pcie_port *pp);
/* Keystone specific PCI controller APIs */
void ks_dw_pcie_enable_legacy_irqs(struct keystone_pcie *ks_pcie);
void ks_dw_pcie_handle_legacy_irq(struct keystone_pcie *ks_pcie, int offset);
-void ks_dw_pcie_enable_error_irq(void __iomem *reg_base);
-irqreturn_t ks_dw_pcie_handle_error_irq(struct device *dev,
- void __iomem *reg_base);
+void ks_dw_pcie_enable_error_irq(struct keystone_pcie *ks_pcie);
+irqreturn_t ks_dw_pcie_handle_error_irq(struct keystone_pcie *ks_pcie);
int ks_dw_pcie_host_init(struct keystone_pcie *ks_pcie,
struct device_node *msi_intc_np);
int ks_dw_pcie_wr_other_conf(struct pcie_port *pp, struct pci_bus *bus,
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 4/6] PCI: keystone: Pass keystone_pcie, not va_app_base, to DBI functions
2016-10-12 13:53 [PATCH v2 0/6] PCI: keystone: Cleanups Bjorn Helgaas
` (2 preceding siblings ...)
2016-10-12 13:53 ` [PATCH v2 3/6] PCI: keystone: Pass keystone_pcie, not address, to IRQ functions Bjorn Helgaas
@ 2016-10-12 13:53 ` Bjorn Helgaas
2016-10-12 13:53 ` [PATCH v2 5/6] PCI: keystone: Add app register accessors Bjorn Helgaas
` (2 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Bjorn Helgaas @ 2016-10-12 13:53 UTC (permalink / raw)
To: Murali Karicheri; +Cc: linux-pci
Instead of passing ks_pcie->va_app_base to DBI mode functions,
pass the struct keystone_pcie. This will allow them to use register
accessors. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/pci/host/pci-keystone-dw.c | 24 ++++++++++++------------
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/pci/host/pci-keystone-dw.c b/drivers/pci/host/pci-keystone-dw.c
index dae68a2..1de39af 100644
--- a/drivers/pci/host/pci-keystone-dw.c
+++ b/drivers/pci/host/pci-keystone-dw.c
@@ -325,15 +325,15 @@ static const struct irq_domain_ops ks_dw_pcie_legacy_irq_domain_ops = {
* Since modification of dbi_cs2 involves different clock domain, read the
* status back to ensure the transition is complete.
*/
-static void ks_dw_pcie_set_dbi_mode(void __iomem *reg_virt)
+static void ks_dw_pcie_set_dbi_mode(struct keystone_pcie *ks_pcie)
{
u32 val;
- writel(DBI_CS2_EN_VAL | readl(reg_virt + CMD_STATUS),
- reg_virt + CMD_STATUS);
+ writel(DBI_CS2_EN_VAL | readl(ks_pcie->va_app_base + CMD_STATUS),
+ ks_pcie->va_app_base + CMD_STATUS);
do {
- val = readl(reg_virt + CMD_STATUS);
+ val = readl(ks_pcie->va_app_base + CMD_STATUS);
} while (!(val & DBI_CS2_EN_VAL));
}
@@ -343,15 +343,15 @@ static void ks_dw_pcie_set_dbi_mode(void __iomem *reg_virt)
* Since modification of dbi_cs2 involves different clock domain, read the
* status back to ensure the transition is complete.
*/
-static void ks_dw_pcie_clear_dbi_mode(void __iomem *reg_virt)
+static void ks_dw_pcie_clear_dbi_mode(struct keystone_pcie *ks_pcie)
{
u32 val;
- writel(~DBI_CS2_EN_VAL & readl(reg_virt + CMD_STATUS),
- reg_virt + CMD_STATUS);
+ writel(~DBI_CS2_EN_VAL & readl(ks_pcie->va_app_base + CMD_STATUS),
+ ks_pcie->va_app_base + CMD_STATUS);
do {
- val = readl(reg_virt + CMD_STATUS);
+ val = readl(ks_pcie->va_app_base + CMD_STATUS);
} while (val & DBI_CS2_EN_VAL);
}
@@ -362,10 +362,10 @@ void ks_dw_pcie_setup_rc_app_regs(struct keystone_pcie *ks_pcie)
int i, tr_size;
/* Disable BARs for inbound access */
- ks_dw_pcie_set_dbi_mode(ks_pcie->va_app_base);
+ ks_dw_pcie_set_dbi_mode(ks_pcie);
dw_pcie_writel_rc(pp, PCI_BASE_ADDRESS_0, 0);
dw_pcie_writel_rc(pp, PCI_BASE_ADDRESS_1, 0);
- ks_dw_pcie_clear_dbi_mode(ks_pcie->va_app_base);
+ ks_dw_pcie_clear_dbi_mode(ks_pcie);
/* Set outbound translation size per window division */
writel(CFG_PCIM_WIN_SZ_IDX & 0x7, ks_pcie->va_app_base + OB_SIZE);
@@ -459,13 +459,13 @@ void ks_dw_pcie_v3_65_scan_bus(struct pcie_port *pp)
struct keystone_pcie *ks_pcie = to_keystone_pcie(pp);
/* Configure and set up BAR0 */
- ks_dw_pcie_set_dbi_mode(ks_pcie->va_app_base);
+ ks_dw_pcie_set_dbi_mode(ks_pcie);
/* Enable BAR0 */
dw_pcie_writel_rc(pp, PCI_BASE_ADDRESS_0, 1);
dw_pcie_writel_rc(pp, PCI_BASE_ADDRESS_0, SZ_4K - 1);
- ks_dw_pcie_clear_dbi_mode(ks_pcie->va_app_base);
+ ks_dw_pcie_clear_dbi_mode(ks_pcie);
/*
* For BAR0, just setting bus address for inbound writes (MSI) should
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 5/6] PCI: keystone: Add app register accessors
2016-10-12 13:53 [PATCH v2 0/6] PCI: keystone: Cleanups Bjorn Helgaas
` (3 preceding siblings ...)
2016-10-12 13:53 ` [PATCH v2 4/6] PCI: keystone: Pass keystone_pcie, not va_app_base, to DBI functions Bjorn Helgaas
@ 2016-10-12 13:53 ` Bjorn Helgaas
2016-10-12 13:53 ` [PATCH v2 6/6] PCI: keystone: Reorder struct keystone_pcie Bjorn Helgaas
2016-10-12 16:06 ` [PATCH v2 0/6] PCI: keystone: Cleanups Bjorn Helgaas
6 siblings, 0 replies; 10+ messages in thread
From: Bjorn Helgaas @ 2016-10-12 13:53 UTC (permalink / raw)
To: Murali Karicheri; +Cc: linux-pci
Add device-specific register accessors for consistency across host drivers.
No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/pci/host/pci-keystone-dw.c | 72 +++++++++++++++++++++---------------
1 file changed, 41 insertions(+), 31 deletions(-)
diff --git a/drivers/pci/host/pci-keystone-dw.c b/drivers/pci/host/pci-keystone-dw.c
index 1de39af..9397c46 100644
--- a/drivers/pci/host/pci-keystone-dw.c
+++ b/drivers/pci/host/pci-keystone-dw.c
@@ -88,6 +88,16 @@ phys_addr_t ks_dw_pcie_get_msi_addr(struct pcie_port *pp)
return ks_pcie->app.start + MSI_IRQ;
}
+static u32 ks_dw_app_readl(struct keystone_pcie *ks_pcie, u32 offset)
+{
+ return readl(ks_pcie->va_app_base + offset);
+}
+
+static void ks_dw_app_writel(struct keystone_pcie *ks_pcie, u32 offset, u32 val)
+{
+ writel(val, ks_pcie->va_app_base + offset);
+}
+
void ks_dw_pcie_handle_msi_irq(struct keystone_pcie *ks_pcie, int offset)
{
struct pcie_port *pp = &ks_pcie->pp;
@@ -95,7 +105,7 @@ void ks_dw_pcie_handle_msi_irq(struct keystone_pcie *ks_pcie, int offset)
u32 pending, vector;
int src, virq;
- pending = readl(ks_pcie->va_app_base + MSI0_IRQ_STATUS + (offset << 4));
+ pending = ks_dw_app_readl(ks_pcie, MSI0_IRQ_STATUS + (offset << 4));
/*
* MSI0 status bit 0-3 shows vectors 0, 8, 16, 24, MSI1 status bit
@@ -125,9 +135,9 @@ static void ks_dw_pcie_msi_irq_ack(struct irq_data *d)
offset = d->irq - irq_linear_revmap(pp->irq_domain, 0);
update_reg_offset_bit_pos(offset, ®_offset, &bit_pos);
- writel(BIT(bit_pos),
- ks_pcie->va_app_base + MSI0_IRQ_STATUS + (reg_offset << 4));
- writel(reg_offset + MSI_IRQ_OFFSET, ks_pcie->va_app_base + IRQ_EOI);
+ ks_dw_app_writel(ks_pcie, MSI0_IRQ_STATUS + (reg_offset << 4),
+ BIT(bit_pos));
+ ks_dw_app_writel(ks_pcie, IRQ_EOI, reg_offset + MSI_IRQ_OFFSET);
}
void ks_dw_pcie_msi_set_irq(struct pcie_port *pp, int irq)
@@ -136,8 +146,8 @@ void ks_dw_pcie_msi_set_irq(struct pcie_port *pp, int irq)
struct keystone_pcie *ks_pcie = to_keystone_pcie(pp);
update_reg_offset_bit_pos(irq, ®_offset, &bit_pos);
- writel(BIT(bit_pos),
- ks_pcie->va_app_base + MSI0_IRQ_ENABLE_SET + (reg_offset << 4));
+ ks_dw_app_writel(ks_pcie, MSI0_IRQ_ENABLE_SET + (reg_offset << 4),
+ BIT(bit_pos));
}
void ks_dw_pcie_msi_clear_irq(struct pcie_port *pp, int irq)
@@ -146,8 +156,8 @@ void ks_dw_pcie_msi_clear_irq(struct pcie_port *pp, int irq)
struct keystone_pcie *ks_pcie = to_keystone_pcie(pp);
update_reg_offset_bit_pos(irq, ®_offset, &bit_pos);
- writel(BIT(bit_pos),
- ks_pcie->va_app_base + MSI0_IRQ_ENABLE_CLR + (reg_offset << 4));
+ ks_dw_app_writel(ks_pcie, MSI0_IRQ_ENABLE_CLR + (reg_offset << 4),
+ BIT(bit_pos));
}
static void ks_dw_pcie_msi_irq_mask(struct irq_data *d)
@@ -239,7 +249,7 @@ void ks_dw_pcie_enable_legacy_irqs(struct keystone_pcie *ks_pcie)
int i;
for (i = 0; i < MAX_LEGACY_IRQS; i++)
- writel(0x1, ks_pcie->va_app_base + IRQ_ENABLE_SET + (i << 4));
+ ks_dw_app_writel(ks_pcie, IRQ_ENABLE_SET + (i << 4), 0x1);
}
void ks_dw_pcie_handle_legacy_irq(struct keystone_pcie *ks_pcie, int offset)
@@ -249,7 +259,7 @@ void ks_dw_pcie_handle_legacy_irq(struct keystone_pcie *ks_pcie, int offset)
u32 pending;
int virq;
- pending = readl(ks_pcie->va_app_base + IRQ_STATUS + (offset << 4));
+ pending = ks_dw_app_readl(ks_pcie, IRQ_STATUS + (offset << 4));
if (BIT(0) & pending) {
virq = irq_linear_revmap(ks_pcie->legacy_irq_domain, offset);
@@ -258,20 +268,19 @@ void ks_dw_pcie_handle_legacy_irq(struct keystone_pcie *ks_pcie, int offset)
}
/* EOI the INTx interrupt */
- writel(offset, ks_pcie->va_app_base + IRQ_EOI);
+ ks_dw_app_writel(ks_pcie, IRQ_EOI, offset);
}
void ks_dw_pcie_enable_error_irq(struct keystone_pcie *ks_pcie)
{
- writel(ERR_IRQ_ALL, ks_pcie->va_app_base + ERR_IRQ_ENABLE_SET);
+ ks_dw_app_writel(ks_pcie, ERR_IRQ_ENABLE_SET, ERR_IRQ_ALL);
}
irqreturn_t ks_dw_pcie_handle_error_irq(struct keystone_pcie *ks_pcie)
{
u32 status;
- status = readl(ks_pcie->va_app_base + ERR_IRQ_STATUS_RAW) &
- ERR_IRQ_ALL;
+ status = ks_dw_app_readl(ks_pcie, ERR_IRQ_STATUS_RAW) & ERR_IRQ_ALL;
if (!status)
return IRQ_NONE;
@@ -280,7 +289,7 @@ irqreturn_t ks_dw_pcie_handle_error_irq(struct keystone_pcie *ks_pcie)
status);
/* Ack the IRQ; status bits are RW1C */
- writel(status, ks_pcie->va_app_base + ERR_IRQ_STATUS);
+ ks_dw_app_writel(ks_pcie, ERR_IRQ_STATUS, status);
return IRQ_HANDLED;
}
@@ -329,11 +338,11 @@ static void ks_dw_pcie_set_dbi_mode(struct keystone_pcie *ks_pcie)
{
u32 val;
- writel(DBI_CS2_EN_VAL | readl(ks_pcie->va_app_base + CMD_STATUS),
- ks_pcie->va_app_base + CMD_STATUS);
+ val = ks_dw_app_readl(ks_pcie, CMD_STATUS);
+ ks_dw_app_writel(ks_pcie, CMD_STATUS, DBI_CS2_EN_VAL | val);
do {
- val = readl(ks_pcie->va_app_base + CMD_STATUS);
+ val = ks_dw_app_readl(ks_pcie, CMD_STATUS);
} while (!(val & DBI_CS2_EN_VAL));
}
@@ -347,11 +356,11 @@ static void ks_dw_pcie_clear_dbi_mode(struct keystone_pcie *ks_pcie)
{
u32 val;
- writel(~DBI_CS2_EN_VAL & readl(ks_pcie->va_app_base + CMD_STATUS),
- ks_pcie->va_app_base + CMD_STATUS);
+ val = ks_dw_app_readl(ks_pcie, CMD_STATUS);
+ ks_dw_app_writel(ks_pcie, CMD_STATUS, ~DBI_CS2_EN_VAL & val);
do {
- val = readl(ks_pcie->va_app_base + CMD_STATUS);
+ val = ks_dw_app_readl(ks_pcie, CMD_STATUS);
} while (val & DBI_CS2_EN_VAL);
}
@@ -360,6 +369,7 @@ void ks_dw_pcie_setup_rc_app_regs(struct keystone_pcie *ks_pcie)
struct pcie_port *pp = &ks_pcie->pp;
u32 start = pp->mem->start, end = pp->mem->end;
int i, tr_size;
+ u32 val;
/* Disable BARs for inbound access */
ks_dw_pcie_set_dbi_mode(ks_pcie);
@@ -368,20 +378,20 @@ void ks_dw_pcie_setup_rc_app_regs(struct keystone_pcie *ks_pcie)
ks_dw_pcie_clear_dbi_mode(ks_pcie);
/* Set outbound translation size per window division */
- writel(CFG_PCIM_WIN_SZ_IDX & 0x7, ks_pcie->va_app_base + OB_SIZE);
+ ks_dw_app_writel(ks_pcie, OB_SIZE, CFG_PCIM_WIN_SZ_IDX & 0x7);
tr_size = (1 << (CFG_PCIM_WIN_SZ_IDX & 0x7)) * SZ_1M;
/* Using Direct 1:1 mapping of RC <-> PCI memory space */
for (i = 0; (i < CFG_PCIM_WIN_CNT) && (start < end); i++) {
- writel(start | 1, ks_pcie->va_app_base + OB_OFFSET_INDEX(i));
- writel(0, ks_pcie->va_app_base + OB_OFFSET_HI(i));
+ ks_dw_app_writel(ks_pcie, OB_OFFSET_INDEX(i), start | 1);
+ ks_dw_app_writel(ks_pcie, OB_OFFSET_HI(i), 0);
start += tr_size;
}
/* Enable OB translation */
- writel(OB_XLAT_EN_VAL | readl(ks_pcie->va_app_base + CMD_STATUS),
- ks_pcie->va_app_base + CMD_STATUS);
+ val = ks_dw_app_readl(ks_pcie, CMD_STATUS);
+ ks_dw_app_writel(ks_pcie, CMD_STATUS, OB_XLAT_EN_VAL | val);
}
/**
@@ -421,7 +431,7 @@ static void __iomem *ks_pcie_cfg_setup(struct keystone_pcie *ks_pcie, u8 bus,
if (bus != 1)
regval |= BIT(24);
- writel(regval, ks_pcie->va_app_base + CFG_SETUP);
+ ks_dw_app_writel(ks_pcie, CFG_SETUP, regval);
return pp->va_cfg0_base;
}
@@ -490,13 +500,13 @@ void ks_dw_pcie_initiate_link_train(struct keystone_pcie *ks_pcie)
u32 val;
/* Disable Link training */
- val = readl(ks_pcie->va_app_base + CMD_STATUS);
+ val = ks_dw_app_readl(ks_pcie, CMD_STATUS);
val &= ~LTSSM_EN_VAL;
- writel(LTSSM_EN_VAL | val, ks_pcie->va_app_base + CMD_STATUS);
+ ks_dw_app_writel(ks_pcie, CMD_STATUS, LTSSM_EN_VAL | val);
/* Initiate Link Training */
- val = readl(ks_pcie->va_app_base + CMD_STATUS);
- writel(LTSSM_EN_VAL | val, ks_pcie->va_app_base + CMD_STATUS);
+ val = ks_dw_app_readl(ks_pcie, CMD_STATUS);
+ ks_dw_app_writel(ks_pcie, CMD_STATUS, LTSSM_EN_VAL | val);
}
/**
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 6/6] PCI: keystone: Reorder struct keystone_pcie
2016-10-12 13:53 [PATCH v2 0/6] PCI: keystone: Cleanups Bjorn Helgaas
` (4 preceding siblings ...)
2016-10-12 13:53 ` [PATCH v2 5/6] PCI: keystone: Add app register accessors Bjorn Helgaas
@ 2016-10-12 13:53 ` Bjorn Helgaas
2016-10-12 16:06 ` [PATCH v2 0/6] PCI: keystone: Cleanups Bjorn Helgaas
6 siblings, 0 replies; 10+ messages in thread
From: Bjorn Helgaas @ 2016-10-12 13:53 UTC (permalink / raw)
To: Murali Karicheri; +Cc: linux-pci
Reorder struct keystone_pcie to put generic fields first. No functional
change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/pci/host/pci-keystone.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/host/pci-keystone.h b/drivers/pci/host/pci-keystone.h
index fe2f741..bc54baf 100644
--- a/drivers/pci/host/pci-keystone.h
+++ b/drivers/pci/host/pci-keystone.h
@@ -17,8 +17,8 @@
#define MAX_LEGACY_HOST_IRQS 4
struct keystone_pcie {
+ struct pcie_port pp; /* pp.dbi_base is DT 0th res */
struct clk *clk;
- struct pcie_port pp;
/* PCI Device ID */
u32 device_id;
int num_legacy_host_irqs;
@@ -34,7 +34,7 @@ struct keystone_pcie {
int error_irq;
/* Application register space */
- void __iomem *va_app_base;
+ void __iomem *va_app_base; /* DT 1st resource */
struct resource app;
};
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH v2 0/6] PCI: keystone: Cleanups
2016-10-12 13:53 [PATCH v2 0/6] PCI: keystone: Cleanups Bjorn Helgaas
` (5 preceding siblings ...)
2016-10-12 13:53 ` [PATCH v2 6/6] PCI: keystone: Reorder struct keystone_pcie Bjorn Helgaas
@ 2016-10-12 16:06 ` Bjorn Helgaas
2016-10-13 17:56 ` Murali Karicheri
6 siblings, 1 reply; 10+ messages in thread
From: Bjorn Helgaas @ 2016-10-12 16:06 UTC (permalink / raw)
To: Bjorn Helgaas; +Cc: Murali Karicheri, linux-pci
On Wed, Oct 12, 2016 at 08:53:00AM -0500, Bjorn Helgaas wrote:
> - Add local "dev" pointers to reduce repetition of things like
> "&pdev->dev".
>
> - Use generic DesignWare accessors when possible.
>
> - Pass device-specific struct instead of register addresses to IRQ and
> DBI functions.
>
> - Add app register accessors to encapsulate usage of va_app_base.
>
> Nothing here should change the behavior of the driver.
>
> Changes from v1:
> Added local struct device pointers.
> I dropped the following patch because it was a lot of churn for
> questionable benefit:
> PCI: keystone: Name private struct pointer "keystone" consistently
>
> ---
>
> Bjorn Helgaas (6):
> PCI: keystone: Add local struct device pointers
> PCI: keystone: Use generic DesignWare accessors
> PCI: keystone: Pass keystone_pcie, not address, to IRQ functions
> PCI: keystone: Pass keystone_pcie, not va_app_base, to DBI functions
> PCI: keystone: Add app register accessors
> PCI: keystone: Reorder struct keystone_pcie
>
>
> drivers/pci/host/pci-keystone-dw.c | 123 ++++++++++++++++++++----------------
> drivers/pci/host/pci-keystone.c | 28 ++++----
> drivers/pci/host/pci-keystone.h | 9 +--
> 3 files changed, 88 insertions(+), 72 deletions(-)
I applied these to pci/host-keystone for v4.9. I hope to ask Linus to
pull them tomorrow, so if you see any issues, let me know soon.
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH v2 0/6] PCI: keystone: Cleanups
2016-10-12 16:06 ` [PATCH v2 0/6] PCI: keystone: Cleanups Bjorn Helgaas
@ 2016-10-13 17:56 ` Murali Karicheri
2016-10-13 18:27 ` Bjorn Helgaas
0 siblings, 1 reply; 10+ messages in thread
From: Murali Karicheri @ 2016-10-13 17:56 UTC (permalink / raw)
To: Bjorn Helgaas, Bjorn Helgaas; +Cc: linux-pci
On 10/12/2016 12:06 PM, Bjorn Helgaas wrote:
> On Wed, Oct 12, 2016 at 08:53:00AM -0500, Bjorn Helgaas wrote:
>> - Add local "dev" pointers to reduce repetition of things like
>> "&pdev->dev".
>>
>> - Use generic DesignWare accessors when possible.
>>
>> - Pass device-specific struct instead of register addresses to IRQ and
>> DBI functions.
>>
>> - Add app register accessors to encapsulate usage of va_app_base.
>>
>> Nothing here should change the behavior of the driver.
>>
>> Changes from v1:
>> Added local struct device pointers.
>> I dropped the following patch because it was a lot of churn for
>> questionable benefit:
>> PCI: keystone: Name private struct pointer "keystone" consistently
>>
>> ---
>>
>> Bjorn Helgaas (6):
>> PCI: keystone: Add local struct device pointers
>> PCI: keystone: Use generic DesignWare accessors
>> PCI: keystone: Pass keystone_pcie, not address, to IRQ functions
>> PCI: keystone: Pass keystone_pcie, not va_app_base, to DBI functions
>> PCI: keystone: Add app register accessors
>> PCI: keystone: Reorder struct keystone_pcie
>>
>>
>> drivers/pci/host/pci-keystone-dw.c | 123 ++++++++++++++++++++----------------
>> drivers/pci/host/pci-keystone.c | 28 ++++----
>> drivers/pci/host/pci-keystone.h | 9 +--
>> 3 files changed, 88 insertions(+), 72 deletions(-)
>
> I applied these to pci/host-keystone for v4.9. I hope to ask Linus to
> pull them tomorrow, so if you see any issues, let me know soon.
>
Bjorn,
I have reviewed them and they look good to me. For testing, I am in the
middle of a high visibility debug and it will be a while before I can test
these.
Thanks
--
Murali Karicheri
Linux Kernel, Keystone
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 0/6] PCI: keystone: Cleanups
2016-10-13 17:56 ` Murali Karicheri
@ 2016-10-13 18:27 ` Bjorn Helgaas
0 siblings, 0 replies; 10+ messages in thread
From: Bjorn Helgaas @ 2016-10-13 18:27 UTC (permalink / raw)
To: Murali Karicheri; +Cc: Bjorn Helgaas, linux-pci
On Thu, Oct 13, 2016 at 01:56:46PM -0400, Murali Karicheri wrote:
> On 10/12/2016 12:06 PM, Bjorn Helgaas wrote:
> > On Wed, Oct 12, 2016 at 08:53:00AM -0500, Bjorn Helgaas wrote:
> >> - Add local "dev" pointers to reduce repetition of things like
> >> "&pdev->dev".
> >>
> >> - Use generic DesignWare accessors when possible.
> >>
> >> - Pass device-specific struct instead of register addresses to IRQ and
> >> DBI functions.
> >>
> >> - Add app register accessors to encapsulate usage of va_app_base.
> >>
> >> Nothing here should change the behavior of the driver.
> >>
> >> Changes from v1:
> >> Added local struct device pointers.
> >> I dropped the following patch because it was a lot of churn for
> >> questionable benefit:
> >> PCI: keystone: Name private struct pointer "keystone" consistently
> >>
> >> ---
> >>
> >> Bjorn Helgaas (6):
> >> PCI: keystone: Add local struct device pointers
> >> PCI: keystone: Use generic DesignWare accessors
> >> PCI: keystone: Pass keystone_pcie, not address, to IRQ functions
> >> PCI: keystone: Pass keystone_pcie, not va_app_base, to DBI functions
> >> PCI: keystone: Add app register accessors
> >> PCI: keystone: Reorder struct keystone_pcie
> >>
> >>
> >> drivers/pci/host/pci-keystone-dw.c | 123 ++++++++++++++++++++----------------
> >> drivers/pci/host/pci-keystone.c | 28 ++++----
> >> drivers/pci/host/pci-keystone.h | 9 +--
> >> 3 files changed, 88 insertions(+), 72 deletions(-)
> >
> > I applied these to pci/host-keystone for v4.9. I hope to ask Linus to
> > pull them tomorrow, so if you see any issues, let me know soon.
> >
> Bjorn,
>
> I have reviewed them and they look good to me. For testing, I am in the
> middle of a high visibility debug and it will be a while before I can test
> these.
Thanks a lot, Murali! No hurry; if I broke something, we can fix it
during the rest of the cycle.
Bjorn
^ permalink raw reply [flat|nested] 10+ messages in thread