From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: Klaus Kudielka <klaus.kudielka@gmail.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
linux-pci@vger.kernel.org, LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/1] PCI: Do not size non-existing prefetchable window
Date: Mon, 27 Oct 2025 19:55:05 +0200 (EET) [thread overview]
Message-ID: <5b6d7dfb-b2d2-a596-1f41-0428426a791f@linux.intel.com> (raw)
In-Reply-To: <4419385c114b344ba5c1d5b0a817a322b37624cc.camel@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 2326 bytes --]
On Mon, 27 Oct 2025, Klaus Kudielka wrote:
> On Mon, 2025-10-27 at 15:24 +0200, Ilpo Järvinen wrote:
> > pbus_size_mem() should only be called for bridge windows that exist but
> > __pci_bus_size_bridges() may point 'pref' to a resource that does not
> > exist (has zero flags) in case of non-root buses.
> >
> > When prefetchable bridge window does not exist, the same
> > non-prefetchable bridge window is sized more than once which may result
> > in duplicating entries into the realloc_head list. Duplicated entries
> > are shown in this log and trigger a WARN_ON() because realloc_head had
> > residual entries after the resource assignment algorithm:
> >
> > pci 0000:00:03.0: [11ab:6820] type 01 class 0x060400 PCIe Root Port
> > pci 0000:00:03.0: PCI bridge to [bus 00]
> > pci 0000:00:03.0: bridge window [io 0x0000-0x0fff]
> > pci 0000:00:03.0: bridge window [mem 0x00000000-0x000fffff]
> > pci 0000:00:03.0: bridge window [mem 0x00200000-0x003fffff] to [bus 02] add_size 200000 add_align 200000
> > pci 0000:00:03.0: bridge window [mem 0x00200000-0x003fffff] to [bus 02] add_size 200000 add_align 200000
> > pci 0000:00:03.0: bridge window [mem 0xe0000000-0xe03fffff]: assigned
> > pci 0000:00:03.0: PCI bridge to [bus 02]
> > pci 0000:00:03.0: bridge window [mem 0xe0000000-0xe03fffff]
> > ------------[ cut here ]------------
> > WARNING: CPU: 0 PID: 1 at drivers/pci/setup-bus.c:2373 pci_assign_unassigned_root_bus_resources+0x1bc/0x234
>
> With this patch on top of v6.18-rc3, the boot log looks clean again:
>
> pci 0000:00:03.0: [11ab:6820] type 01 class 0x060400 PCIe Root Port
> pci 0000:00:03.0: PCI bridge to [bus 00]
> pci 0000:00:03.0: bridge window [io 0x0000-0x0fff]
> pci 0000:00:03.0: bridge window [mem 0x00000000-0x000fffff]
> pci 0000:00:03.0: bridge configuration invalid ([bus 00-00]), reconfiguring
> pci 0000:00:03.0: bridge window [mem 0x00200000-0x003fffff] to [bus 02] add_size 200000 add_align 200000
> pci 0000:00:03.0: bridge window [mem 0xe0000000-0xe03fffff]: assigned
> pci 0000:00:03.0: PCI bridge to [bus 02]
> pci 0000:00:03.0: bridge window [mem 0xe0000000-0xe03fffff]
>
> (and no WARNING thereafter)
> Thanks a lot!
>
> Tested-by: Klaus Kudielka <klaus.kudielka@gmail.com>
Thanks for testing.
--
i.
next prev parent reply other threads:[~2025-10-27 17:55 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-27 13:24 [PATCH 1/1] PCI: Do not size non-existing prefetchable window Ilpo Järvinen
2025-10-27 17:45 ` Klaus Kudielka
2025-10-27 17:55 ` Ilpo Järvinen [this message]
2025-10-27 23:12 ` Bjorn Helgaas
2025-10-27 23:15 ` Ilpo Järvinen
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