Linux PCI subsystem development
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From: Aksh Garg <a-garg7@ti.com>
To: "Linmao Li" <lilinmao@kylinos.cn>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Manivannan Sadhasivam" <mani@kernel.org>
Cc: Rob Herring <robh@kernel.org>, Tom Joseph <tjoseph@cadence.com>,
	"Vladimir Oltean" <vladimir.oltean@nxp.com>,
	<linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2] PCI: cadence: Store the core controller in platform drvdata
Date: Wed, 16 Sep 2026 16:08:57 +0530	[thread overview]
Message-ID: <5d11ff80-02b9-41f6-9022-b784b9459ea9@ti.com> (raw)
In-Reply-To: <20260915082826.4135665-1-lilinmao@kylinos.cn>



On 15/09/26 13:58, Linmao Li wrote:
> cdns_plat_pcie_probe() stores a struct cdns_plat_pcie pointer with
> platform_set_drvdata(). cdns_plat_pcie_shutdown() and the callbacks in
> cdns_pcie_pm_ops retrieve the same pointer with dev_get_drvdata() and
> use it as a struct cdns_pcie pointer. This makes them read phy_count
> and phy beyond the wrapper.
> 
> struct cdns_plat_pcie only contains a pointer to struct cdns_pcie. Drop
> the redundant wrapper and store the struct cdns_pcie pointer directly.
> 
> Fixes: bd22885aa188 ("PCI: cadence: Refactor driver to use as a core library")
> Suggested-by: Aksh Garg <a-garg7@ti.com>
> Signed-off-by: Linmao Li <lilinmao@kylinos.cn>
> ---

Suggested-by tag can be dropped IMO as the suggestion was not the core 
insight of the patch (to store the struct cdns_pcie pointer directly).

Reviewed-by: Aksh Garg <a-garg7@ti.com>

Regards,
Aksh Garg

> Changes in v2:
> - Drop the redundant struct cdns_plat_pcie wrapper (Aksh Garg).
> ---
>   .../controller/cadence/pcie-cadence-plat.c    | 27 ++++++-------------
>   1 file changed, 8 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/pci/controller/cadence/pcie-cadence-plat.c b/drivers/pci/controller/cadence/pcie-cadence-plat.c
> index 13edc6be21f5..4a24302cc5b2 100644
> --- a/drivers/pci/controller/cadence/pcie-cadence-plat.c
> +++ b/drivers/pci/controller/cadence/pcie-cadence-plat.c
> @@ -14,14 +14,6 @@
>   
>   #define CDNS_PLAT_CPU_TO_BUS_ADDR	0x0FFFFFFF
>   
> -/**
> - * struct cdns_plat_pcie - private data for this PCIe platform driver
> - * @pcie: Cadence PCIe controller
> - */
> -struct cdns_plat_pcie {
> -	struct cdns_pcie        *pcie;
> -};
> -
>   static const struct of_device_id cdns_plat_pcie_of_match[];
>   
>   static u64 cdns_plat_cpu_addr_fixup(struct cdns_pcie *pcie, u64 cpu_addr)
> @@ -36,9 +28,9 @@ static const struct cdns_pcie_ops cdns_plat_ops = {
>   static int cdns_plat_pcie_probe(struct platform_device *pdev)
>   {
>   	const struct cdns_plat_pcie_of_data *data;
> -	struct cdns_plat_pcie *cdns_plat_pcie;
>   	struct device *dev = &pdev->dev;
>   	struct pci_host_bridge *bridge;
> +	struct cdns_pcie *pcie;
>   	struct cdns_pcie_ep *ep;
>   	struct cdns_pcie_rc *rc;
>   	bool is_rc;
> @@ -51,11 +43,6 @@ static int cdns_plat_pcie_probe(struct platform_device *pdev)
>   	is_rc = data->is_rc;
>   
>   	pr_debug(" Started %s with is_rc: %d\n", __func__, is_rc);
> -	cdns_plat_pcie = devm_kzalloc(dev, sizeof(*cdns_plat_pcie), GFP_KERNEL);
> -	if (!cdns_plat_pcie)
> -		return -ENOMEM;
> -
> -	platform_set_drvdata(pdev, cdns_plat_pcie);
>   	if (is_rc) {
>   		if (!IS_ENABLED(CONFIG_PCIE_CADENCE_PLAT_HOST))
>   			return -ENODEV;
> @@ -67,9 +54,9 @@ static int cdns_plat_pcie_probe(struct platform_device *pdev)
>   		rc = pci_host_bridge_priv(bridge);
>   		rc->pcie.dev = dev;
>   		rc->pcie.ops = &cdns_plat_ops;
> -		cdns_plat_pcie->pcie = &rc->pcie;
> +		pcie = &rc->pcie;
>   
> -		ret = cdns_pcie_init_phy(dev, cdns_plat_pcie->pcie);
> +		ret = cdns_pcie_init_phy(dev, pcie);
>   		if (ret) {
>   			dev_err(dev, "failed to init phy\n");
>   			return ret;
> @@ -94,9 +81,9 @@ static int cdns_plat_pcie_probe(struct platform_device *pdev)
>   
>   		ep->pcie.dev = dev;
>   		ep->pcie.ops = &cdns_plat_ops;
> -		cdns_plat_pcie->pcie = &ep->pcie;
> +		pcie = &ep->pcie;
>   
> -		ret = cdns_pcie_init_phy(dev, cdns_plat_pcie->pcie);
> +		ret = cdns_pcie_init_phy(dev, pcie);
>   		if (ret) {
>   			dev_err(dev, "failed to init phy\n");
>   			return ret;
> @@ -114,13 +101,15 @@ static int cdns_plat_pcie_probe(struct platform_device *pdev)
>   			goto err_init;
>   	}
>   
> +	platform_set_drvdata(pdev, pcie);
> +
>   	return 0;
>   
>    err_init:
>    err_get_sync:
>   	pm_runtime_put_sync(dev);
>   	pm_runtime_disable(dev);
> -	cdns_pcie_disable_phy(cdns_plat_pcie->pcie);
> +	cdns_pcie_disable_phy(pcie);
>   
>   	return ret;
>   }
> 
> base-commit: 9a9d18547ddc97a73d5d90cff4d5aef90bd8c15d


  parent reply	other threads:[~2026-09-16 10:39 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-15  8:28 [PATCH v2] PCI: cadence: Store the core controller in platform drvdata Linmao Li
2026-09-15  8:39 ` sashiko-bot
2026-09-16 10:38 ` Aksh Garg [this message]
     [not found] ` <1789614322740341.344.seg@mailgw.kylinos.cn>
2026-09-17  3:25   ` Linmao Li

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