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From: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
To: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
	Bjorn Helgaas <helgaas@kernel.org>
Cc: "Bjorn Helgaas" <bhelgaas@google.com>,
	"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
	"Jingoo Han" <jingoohan1@gmail.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Jeff Johnson" <jjohnson@kernel.org>,
	"Bartosz Golaszewski" <brgl@bgdev.pl>,
	"Manivannan Sadhasivam" <mani@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-msm@vger.kernel.org, mhi@lists.linux.dev,
	linux-wireless@vger.kernel.org, ath11k@lists.infradead.org,
	qiang.yu@oss.qualcomm.com, quic_vbadigan@quicinc.com,
	quic_vpernami@quicinc.com, quic_mrana@quicinc.com,
	"Jeff Johnson" <jeff.johnson@oss.qualcomm.com>
Subject: Re: [PATCH v4 02/11] PCI/bwctrl: Add support to scale bandwidth before & after link re-training
Date: Tue, 12 Aug 2025 15:02:18 +0530	[thread overview]
Message-ID: <5dbd782a-1d52-4614-9e7e-3b7d9dfd099f@oss.qualcomm.com> (raw)
In-Reply-To: <3939605c-7335-4401-ba32-b88ee900f1d5@oss.qualcomm.com>



On 8/12/2025 2:57 PM, Konrad Dybcio wrote:
> On 8/12/25 6:05 AM, Krishna Chaitanya Chundru wrote:
>>
>>
>> On 7/22/2025 4:33 PM, Krishna Chaitanya Chundru wrote:
>>>
>>>
>>> On 7/12/2025 4:36 AM, Krishna Chaitanya Chundru wrote:
>>>>
>>>>
>>>> On 7/12/2025 3:06 AM, Bjorn Helgaas wrote:
>>>>> On Mon, Jun 09, 2025 at 04:21:23PM +0530, Krishna Chaitanya Chundru wrote:
>>>>>> If the driver wants to move to higher data rate/speed than the current data
>>>>>> rate then the controller driver may need to change certain votes so that
>>>>>> link may come up at requested data rate/speed like QCOM PCIe controllers
>>>>>> need to change their RPMh (Resource Power Manager-hardened) state. Once
>>>>>> link retraining is done controller drivers needs to adjust their votes
>>>>>> based on the final data rate.
>>>>>>
>>>>>> Some controllers also may need to update their bandwidth voting like
>>>>>> ICC BW votings etc.
>>>>>>
>>>>>> So, add pre_link_speed_change() & post_link_speed_change() op to call
>>>>>> before & after the link re-train. There is no explicit locking mechanisms
>>>>>> as these are called by a single client Endpoint driver.
>>>>>>
>>>>>> In case of PCIe switch, if there is a request to change target speed for a
>>>>>> downstream port then no need to call these function ops as these are
>>>>>> outside the scope of the controller drivers.
>>>>>
>>>>>> +++ b/include/linux/pci.h
>>>>>> @@ -599,6 +599,24 @@ struct pci_host_bridge {
>>>>>>        void (*release_fn)(struct pci_host_bridge *);
>>>>>>        int (*enable_device)(struct pci_host_bridge *bridge, struct pci_dev *dev);
>>>>>>        void (*disable_device)(struct pci_host_bridge *bridge, struct pci_dev *dev);
>>>>>> +    /*
>>>>>> +     * Callback to the host bridge drivers to update ICC BW votes, clock
>>>>>> +     * frequencies etc.. for the link re-train to come up in targeted speed.
>>>>>> +     * These are intended to be called by devices directly attached to the
>>>>>> +     * Root Port. These are called by a single client Endpoint driver, so
>>>>>> +     * there is no need for explicit locking mechanisms.
>>>>>> +     */
>>>>>> +    int (*pre_link_speed_change)(struct pci_host_bridge *bridge,
>>>>>> +                     struct pci_dev *dev, int speed);
>>>>>> +    /*
>>>>>> +     * Callback to the host bridge drivers to adjust ICC BW votes, clock
>>>>>> +     * frequencies etc.. to the updated speed after link re-train. These
>>>>>> +     * are intended to be called by devices directly attached to the
>>>>>> +     * Root Port. These are called by a single client Endpoint driver,
>>>>>> +     * so there is no need for explicit locking mechanisms.
>>>>>
>>>>> No need to repeat the entire comment.  s/.././
>>>>>
>>>>> These pointers feel awfully specific for being in struct
>>>>> pci_host_bridge, since we only need them for a questionable QCOM
>>>>> controller.  I think this needs to be pushed down into qcom somehow as
>>>>> some kind of quirk.
>>>>>
>>>> Currently these are needed by QCOM controllers, but it may also needed
>>>> by other controllers may also need these for updating ICC votes, any
>>>> system level votes, clock frequencies etc.
>>>> QCOM controllers is also doing one extra step in these functions to
>>>> disable and enable ASPM only as it cannot link speed change support
>>>> with ASPM enabled.
>>>>
>>> Bjorn, can you check this.
>>>
>>> For QCOM devices we need to update the RPMh vote i.e a power source
>>> votes for the link to come up in required speed. and also we need
>>> to update interconnect votes also. This will be applicable for
>>> other vendors also.
>>>
>>> If this is not correct place I can add them in the pci_ops.
>> Bjorn,
>>
>> Can you please comment on this.
>>
>> Is this fine to move these to the pci_ops of the bridge.
>> Again these are not specific to QCOM, any controller driver which
>> needs to change their clock rates, ICC bw votes etc needs to have
>> these.
> 
> Do you even need to set the OPP explicitly? The global irq handler
> already does so on linkup, and you seem to toggle the link state in
> the newly introduced helpers
> 
> Now not all DTs currently have a global interrupt, but that's a mass
> fixup to be done anyway..
> 
Konrad,

global IRQ in the qcom controllers will only come in only on initial
linkup, and later on link speed change through bwctrl driver we will
not get global IRQ.

For QCOM controllers we need to change the RPMH vote for example if
we want to update the PCIe data rate from 5 GT/s to 8 GT/s we might
need to update the RPMh vote from low_svs to NOM corner before we
initiate link up. for that reason we are introducing pre & post
link_speed_change function pointer.

- Krishna Chaitanya.
> Konrad

  reply	other threads:[~2025-08-12  9:32 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-09 10:51 [PATCH v4 00/11] bus: mhi: host: Add support for mhi bus bw Krishna Chaitanya Chundru
2025-06-09 10:51 ` [PATCH v4 01/11] PCI: Update current bus speed as part of pci_pwrctrl_notify() Krishna Chaitanya Chundru
2025-07-08 15:13   ` Manivannan Sadhasivam
2025-06-09 10:51 ` [PATCH v4 02/11] PCI/bwctrl: Add support to scale bandwidth before & after link re-training Krishna Chaitanya Chundru
2025-07-08 16:25   ` Manivannan Sadhasivam
2025-07-09 12:08     ` Krishna Chaitanya Chundru
2025-07-11 21:36   ` Bjorn Helgaas
2025-07-11 23:06     ` Krishna Chaitanya Chundru
2025-07-22 11:03       ` Krishna Chaitanya Chundru
2025-08-12  4:05         ` Krishna Chaitanya Chundru
2025-08-12  9:27           ` Konrad Dybcio
2025-08-12  9:32             ` Krishna Chaitanya Chundru [this message]
2025-08-12 16:43           ` Manivannan Sadhasivam
2025-08-13  3:55             ` Krishna Chaitanya Chundru
2025-08-18  7:09               ` Manivannan Sadhasivam
2025-08-18  7:52                 ` Krishna Chaitanya Chundru
2025-06-09 10:51 ` [PATCH v4 03/11] bus: mhi: host: Add support to read MHI capabilities Krishna Chaitanya Chundru
2025-07-08 16:36   ` Manivannan Sadhasivam
2025-07-09 12:09     ` Krishna Chaitanya Chundru
2025-07-09 12:20       ` Ilpo Järvinen
2025-07-09 15:50         ` Hans Zhang
2025-08-18  5:47         ` Krishna Chaitanya Chundru
2025-06-09 10:51 ` [PATCH v4 04/11] bus: mhi: host: Add support for Bandwidth scale Krishna Chaitanya Chundru
2025-07-08 17:06   ` Manivannan Sadhasivam
2025-07-09 12:21     ` Krishna Chaitanya Chundru
2025-07-11  4:33       ` Manivannan Sadhasivam
2025-07-11  6:55         ` Krishna Chaitanya Chundru
2025-07-23 16:25           ` Manivannan Sadhasivam
2025-06-09 10:51 ` [PATCH v4 05/11] PCI/ASPM: Return enabled ASPM states as part of pcie_aspm_enabled() Krishna Chaitanya Chundru
2025-06-09 10:51 ` [PATCH v4 06/11] PCI/ASPM: Clear aspm_disable as part of __pci_enable_link_state() Krishna Chaitanya Chundru
2025-07-08 17:15   ` Manivannan Sadhasivam
2025-07-09  9:10     ` Ilpo Järvinen
2025-07-09 12:31       ` Krishna Chaitanya Chundru
2025-07-11  4:28         ` Manivannan Sadhasivam
2025-07-11  9:21           ` Ilpo Järvinen
2025-07-11 10:55             ` Krishna Chaitanya Chundru
2025-07-11 13:38               ` Ilpo Järvinen
2025-07-11 23:00                 ` Bjorn Helgaas
2025-07-12  9:35                   ` Manivannan Sadhasivam
2025-07-12 16:05                     ` Hans Zhang
2025-07-12 17:02                       ` Manivannan Sadhasivam
2025-07-15 14:53                         ` Hans Zhang
2025-07-14 19:32                       ` Bjorn Helgaas
2025-07-15 14:48                         ` Hans Zhang
2025-07-13 16:27                     ` Ilpo Järvinen
2025-07-14 13:51                       ` Manivannan Sadhasivam
2025-07-14 19:42                         ` Bjorn Helgaas
2025-07-21  7:45                         ` Ilpo Järvinen
2025-07-14 19:21                     ` Bjorn Helgaas
2025-07-13 16:38                   ` Ilpo Järvinen
2025-07-11 23:02   ` Bjorn Helgaas
2025-07-11 23:10     ` Krishna Chaitanya Chundru
2025-06-09 10:51 ` [PATCH v4 07/11] PCI: qcom: Extract core logic from qcom_pcie_icc_opp_update() Krishna Chaitanya Chundru
2025-06-09 10:51 ` [PATCH v4 08/11] PCI: qcom: Add support for PCIe pre/post_link_speed_change() Krishna Chaitanya Chundru
2025-07-08 17:19   ` Manivannan Sadhasivam
2025-07-11 21:29   ` Bjorn Helgaas
2025-07-11 23:11     ` Krishna Chaitanya Chundru
2025-06-09 10:51 ` [PATCH v4 09/11] PCI: Export pci_set_target_speed() Krishna Chaitanya Chundru
2025-06-09 10:51 ` [PATCH v4 10/11] PCI: Add function to convert lnkctl2speed to pci_bus_speed Krishna Chaitanya Chundru
2025-07-08 17:21   ` Manivannan Sadhasivam
2025-07-11 21:45   ` Bjorn Helgaas
2025-06-09 10:51 ` [PATCH v4 11/11] wifi: ath11k: Add support for MHI bandwidth scaling Krishna Chaitanya Chundru
2025-07-08 17:23   ` Manivannan Sadhasivam

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