From: Dan Williams <dan.j.williams@intel.com>
To: <ira.weiny@intel.com>, Dan Williams <dan.j.williams@intel.com>
Cc: Ira Weiny <ira.weiny@intel.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Davidlohr Bueso <dave@stgolabs.net>,
"Jonathan Cameron" <Jonathan.Cameron@huawei.com>,
Dave Jiang <dave.jiang@intel.com>, <linux-kernel@vger.kernel.org>,
<linux-pci@vger.kernel.org>, <linux-acpi@vger.kernel.org>,
<linux-cxl@vger.kernel.org>
Subject: RE: [PATCH V3 5/8] cxl/mem: Trace Memory Module Event Record
Date: Fri, 9 Dec 2022 14:18:29 -0800 [thread overview]
Message-ID: <6393b43552fcf_579c1294d5@dwillia2-xfh.jf.intel.com.notmuch> (raw)
In-Reply-To: <20221208052115.800170-6-ira.weiny@intel.com>
ira.weiny@ wrote:
> From: Ira Weiny <ira.weiny@intel.com>
>
> CXL rev 3.0 section 8.2.9.2.1.3 defines the Memory Module Event Record.
>
> Determine if the event read is memory module record and if so trace the
> record.
>
Modulo carrying forward the review comments from previous patches, feel
free to add:
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
next prev parent reply other threads:[~2022-12-09 22:19 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-08 5:21 [PATCH V3 0/8] CXL: Process event logs ira.weiny
2022-12-08 5:21 ` [PATCH V3 1/8] cxl/mem: Read, trace, and clear events on driver load ira.weiny
2022-12-09 17:56 ` Dan Williams
2022-12-09 21:00 ` Ira Weiny
2022-12-09 22:33 ` Dan Williams
2022-12-09 23:34 ` Ira Weiny
2022-12-12 17:58 ` Jonathan Cameron
2022-12-08 5:21 ` [PATCH V3 2/8] cxl/mem: Wire up event interrupts ira.weiny
2022-12-09 21:49 ` Dan Williams
2022-12-10 1:44 ` Ira Weiny
2022-12-08 5:21 ` [PATCH V3 3/8] cxl/mem: Trace General Media Event Record ira.weiny
2022-12-09 22:04 ` Dan Williams
2022-12-11 16:08 ` Ira Weiny
2022-12-08 5:21 ` [PATCH V3 4/8] cxl/mem: Trace DRAM " ira.weiny
2022-12-09 22:14 ` Dan Williams
2022-12-11 16:21 ` Ira Weiny
2022-12-08 5:21 ` [PATCH V3 5/8] cxl/mem: Trace Memory Module " ira.weiny
2022-12-09 22:18 ` Dan Williams [this message]
2022-12-08 5:21 ` [PATCH V3 6/8] cxl/test: Add generic mock events ira.weiny
2022-12-09 22:48 ` Dan Williams
2022-12-11 17:26 ` Ira Weiny
2022-12-08 5:21 ` [PATCH V3 7/8] cxl/test: Add specific events ira.weiny
2022-12-08 5:21 ` [PATCH V3 8/8] cxl/test: Simulate event log overflow ira.weiny
2022-12-09 22:52 ` Dan Williams
2022-12-12 4:21 ` Ira Weiny
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