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Mon, 11 Aug 2025 21:05:57 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFWpOgn5/oSzjBCGtryF075Bdr0I0B0VxEDiPRvky8kDJfG/nc/HyC5WphsedOMXvkIvnZC7g== X-Received: by 2002:a17:903:2985:b0:240:640a:c576 with SMTP id d9443c01a7336-242fc232fa2mr27392415ad.15.1754971557017; Mon, 11 Aug 2025 21:05:57 -0700 (PDT) Received: from [10.218.42.132] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-241d1ef67aesm288305795ad.6.2025.08.11.21.05.48 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 11 Aug 2025 21:05:56 -0700 (PDT) Message-ID: <68a78904-e2c7-4d4d-853d-d9cd6413760e@oss.qualcomm.com> Date: Tue, 12 Aug 2025 09:35:46 +0530 Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 02/11] PCI/bwctrl: Add support to scale bandwidth before & after link re-training From: Krishna Chaitanya Chundru To: Bjorn Helgaas Cc: Bjorn Helgaas , =?UTF-8?Q?Ilpo_J=C3=A4rvinen?= , Jingoo Han , Lorenzo Pieralisi , Rob Herring , Jeff Johnson , Bartosz Golaszewski , Manivannan Sadhasivam , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, mhi@lists.linux.dev, linux-wireless@vger.kernel.org, ath11k@lists.infradead.org, qiang.yu@oss.qualcomm.com, quic_vbadigan@quicinc.com, quic_vpernami@quicinc.com, quic_mrana@quicinc.com, Jeff Johnson References: <20250711213602.GA2307197@bhelgaas> <55fc3ae6-ba04-4739-9b89-0356c3e0930c@oss.qualcomm.com> Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODEwMDA1NyBTYWx0ZWRfXyW9rQXtTbU2h 9IAYhFKwY3uPsys1cvhQnW4/FR8Xy0Yyl+htAYEwJ1gydV1aTwdi58QeaG4JiRbmKJEjzko00Bf Y2S/YWDQYbmaZ1opPSYKNKLVIZNof3RwW0teoiS5rqb//o0kRXPJwjkePVZ3cMhVDOn3wXOKuHl CSyRUV0cZ/ivcdZ9Nu/cxVaRqklI7xPYJsCP8oCWf+jXcPn/WaqQYLDZGmRR//M6pSQkU5puupD 02TGggHXHewSMXUUA0QR/1mcyr5+6x+StYGkRQDsIk1Bpch2E+G2Y5ajPaZ5Y/UUy6R2GcuRVei uVjIqmRDL+X97evJ4omYRNoGV9CHFavcudpHL3lP0j2aHipEwFgcZSxjPl5ZV2EwD4BQqpFIudt x7IcRoMd X-Proofpoint-GUID: CDPjp_KqhdpZEBsZOx2_TrMtY5zzsJk4 X-Authority-Analysis: v=2.4 cv=aYNhnQot c=1 sm=1 tr=0 ts=689abda6 cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=uIe58MKiAmNDZ2YlfJsA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 X-Proofpoint-ORIG-GUID: CDPjp_KqhdpZEBsZOx2_TrMtY5zzsJk4 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-12_01,2025-08-11_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 adultscore=0 priorityscore=1501 suspectscore=0 phishscore=0 impostorscore=0 bulkscore=0 malwarescore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508100057 On 7/22/2025 4:33 PM, Krishna Chaitanya Chundru wrote: > > > On 7/12/2025 4:36 AM, Krishna Chaitanya Chundru wrote: >> >> >> On 7/12/2025 3:06 AM, Bjorn Helgaas wrote: >>> On Mon, Jun 09, 2025 at 04:21:23PM +0530, Krishna Chaitanya Chundru >>> wrote: >>>> If the driver wants to move to higher data rate/speed than the >>>> current data >>>> rate then the controller driver may need to change certain votes so >>>> that >>>> link may come up at requested data rate/speed like QCOM PCIe >>>> controllers >>>> need to change their RPMh (Resource Power Manager-hardened) state. Once >>>> link retraining is done controller drivers needs to adjust their votes >>>> based on the final data rate. >>>> >>>> Some controllers also may need to update their bandwidth voting like >>>> ICC BW votings etc. >>>> >>>> So, add pre_link_speed_change() & post_link_speed_change() op to call >>>> before & after the link re-train. There is no explicit locking >>>> mechanisms >>>> as these are called by a single client Endpoint driver. >>>> >>>> In case of PCIe switch, if there is a request to change target speed >>>> for a >>>> downstream port then no need to call these function ops as these are >>>> outside the scope of the controller drivers. >>> >>>> +++ b/include/linux/pci.h >>>> @@ -599,6 +599,24 @@ struct pci_host_bridge { >>>>       void (*release_fn)(struct pci_host_bridge *); >>>>       int (*enable_device)(struct pci_host_bridge *bridge, struct >>>> pci_dev *dev); >>>>       void (*disable_device)(struct pci_host_bridge *bridge, struct >>>> pci_dev *dev); >>>> +    /* >>>> +     * Callback to the host bridge drivers to update ICC BW votes, >>>> clock >>>> +     * frequencies etc.. for the link re-train to come up in >>>> targeted speed. >>>> +     * These are intended to be called by devices directly attached >>>> to the >>>> +     * Root Port. These are called by a single client Endpoint >>>> driver, so >>>> +     * there is no need for explicit locking mechanisms. >>>> +     */ >>>> +    int (*pre_link_speed_change)(struct pci_host_bridge *bridge, >>>> +                     struct pci_dev *dev, int speed); >>>> +    /* >>>> +     * Callback to the host bridge drivers to adjust ICC BW votes, >>>> clock >>>> +     * frequencies etc.. to the updated speed after link re-train. >>>> These >>>> +     * are intended to be called by devices directly attached to the >>>> +     * Root Port. These are called by a single client Endpoint driver, >>>> +     * so there is no need for explicit locking mechanisms. >>> >>> No need to repeat the entire comment.  s/.././ >>> >>> These pointers feel awfully specific for being in struct >>> pci_host_bridge, since we only need them for a questionable QCOM >>> controller.  I think this needs to be pushed down into qcom somehow as >>> some kind of quirk. >>> >> Currently these are needed by QCOM controllers, but it may also needed >> by other controllers may also need these for updating ICC votes, any >> system level votes, clock frequencies etc. >> QCOM controllers is also doing one extra step in these functions to >> disable and enable ASPM only as it cannot link speed change support >> with ASPM enabled. >> > Bjorn, can you check this. > > For QCOM devices we need to update the RPMh vote i.e a power source > votes for the link to come up in required speed. and also we need > to update interconnect votes also. This will be applicable for > other vendors also. > > If this is not correct place I can add them in the pci_ops. Bjorn, Can you please comment on this. Is this fine to move these to the pci_ops of the bridge. Again these are not specific to QCOM, any controller driver which needs to change their clock rates, ICC bw votes etc needs to have these. - Krishna Chaitanya. > - Krishna Chaitanya. >> - Krishna Chaitanya. >>>> +     */ >>>> +    void (*post_link_speed_change)(struct pci_host_bridge *bridge, >>>> +                       struct pci_dev *dev, int speed);