From: <dan.j.williams@intel.com>
To: Alexey Kardashevskiy <aik@amd.com>, <dan.j.williams@intel.com>,
<linux-coco@lists.linux.dev>, <linux-pci@vger.kernel.org>
Cc: <yilun.xu@linux.intel.com>, <aneesh.kumar@kernel.org>,
<gregkh@linuxfoundation.org>, Lukas Wunner <lukas@wunner.de>,
Samuel Ortiz <sameo@rivosinc.com>,
Bjorn Helgaas <bhelgaas@google.com>
Subject: Re: [PATCH v5 04/10] PCI/TSM: Authenticate devices via platform TSM
Date: Fri, 5 Sep 2025 19:07:13 -0700 [thread overview]
Message-ID: <68bb97518dea6_75db10067@dwillia2-mobl4.notmuch> (raw)
In-Reply-To: <67382369-d941-48dd-92f6-8bbad7b26b60@amd.com>
Alexey Kardashevskiy wrote:
[..]
> > TDISP without IDE still needs to do all of SPDM (Component Measurement and
> > Authentication),
>
> Support for PCI_DOE_FEATURE_CMA_SPDM says that then.
Right, the TSM core looks for that (PCI_DOE_PROTO_CMA) as part of
connect because it needs that either for TDISP or IDE.
> >and the TDISP state machine.
>
> I'd think PCI_EXP_DEVCAP_TEE is set on something which allows
> START_INTERFACE_REQUEST and some SRIOV devices may not want to allow
> this on PF0. I am likely to be wrong here then. Hm.
PCI_EXP_DEVCAP_TEE is the only way to identify TDISP capable devices in
the guest, right? So PCI_EXP_DEVCAP_TEE means that there may be a DSM,
or a guest-side TSM tunnel to a DSM, that can affect the TDISP state of
this function.
next prev parent reply other threads:[~2025-09-06 2:07 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-27 3:51 [PATCH v5 00/10] PCI/TSM: Core infrastructure for PCI device security (TDISP) Dan Williams
2025-08-27 3:51 ` [PATCH v5 01/10] coco/tsm: Introduce a core device for TEE Security Managers Dan Williams
2025-08-27 3:51 ` [PATCH v5 02/10] PCI/IDE: Enumerate Selective Stream IDE capabilities Dan Williams
2025-08-27 3:51 ` [PATCH v5 03/10] PCI: Introduce pci_walk_bus_reverse(), for_each_pci_dev_reverse() Dan Williams
2025-08-27 3:51 ` [PATCH v5 04/10] PCI/TSM: Authenticate devices via platform TSM Dan Williams
2025-08-27 13:25 ` Alexey Kardashevskiy
2025-08-29 1:06 ` dan.j.williams
2025-08-29 1:58 ` Alexey Kardashevskiy
2025-09-05 0:50 ` dan.j.williams
2025-09-05 3:34 ` Alexey Kardashevskiy
2025-09-06 2:07 ` dan.j.williams [this message]
2025-08-28 11:43 ` Alexey Kardashevskiy
2025-08-29 1:23 ` dan.j.williams
2025-08-30 13:26 ` Alexey Kardashevskiy
2025-09-05 0:51 ` dan.j.williams
2025-09-02 15:08 ` Aneesh Kumar K.V
2025-09-03 2:03 ` Alexey Kardashevskiy
2025-09-05 20:06 ` dan.j.williams
2025-09-05 19:13 ` dan.j.williams
2025-09-02 15:13 ` Aneesh Kumar K.V
2025-09-03 2:07 ` Alexey Kardashevskiy
2025-09-05 20:13 ` dan.j.williams
2025-09-05 20:03 ` dan.j.williams
2025-09-03 2:17 ` Alexey Kardashevskiy
2025-09-05 20:35 ` dan.j.williams
2025-08-27 3:51 ` [PATCH v5 05/10] samples/devsec: Introduce a PCI device-security bus + endpoint sample Dan Williams
2025-08-27 3:51 ` [PATCH v5 06/10] PCI: Add PCIe Device 3 Extended Capability enumeration Dan Williams
2025-08-27 3:51 ` [PATCH v5 07/10] PCI/IDE: Add IDE establishment helpers Dan Williams
2025-09-02 1:29 ` Alexey Kardashevskiy
2025-09-02 1:54 ` Alexey Kardashevskiy
2025-09-05 1:40 ` dan.j.williams
2025-09-05 2:14 ` Alexey Kardashevskiy
2025-09-06 2:00 ` dan.j.williams
2025-09-05 1:27 ` dan.j.williams
2025-09-05 2:23 ` Alexey Kardashevskiy
2025-08-27 3:51 ` [PATCH v5 08/10] PCI/IDE: Report available IDE streams Dan Williams
2025-08-27 3:51 ` [PATCH v5 09/10] PCI/TSM: Report active " Dan Williams
2025-08-27 3:51 ` [PATCH v5 10/10] samples/devsec: Add sample IDE establishment Dan Williams
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