Re: 2499f53 (PCI: Rework optional resource handling) regression with AMDGPU on Arm AVA platform

["Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>]

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On Wed, 22 Oct 2025, Alex Bennée wrote:

> I've been tracking a regression on my Arm64 (Altra) AVA platform between
> 6.14 and 6.15. It looks like the rework commit broke the ability of the
> amdgpu driver to resize it's bar, resulting in an SError and failure to
> boot:
> 
>   [   15.348097] amdgpu 000d:03:00.0: amdgpu: detected ip block number 8 <vcn_v4_0>
>   [   15.355901] amdgpu 000d:03:00.0: amdgpu: detected ip block number 9 <jpeg_v4_0>
>   [   15.363202] amdgpu 000d:03:00.0: amdgpu: detected ip block number 10 <mes_v11_0>
>   [   15.384163] amdgpu 000d:03:00.0: amdgpu: Fetched VBIOS from ROM BAR
>   [   15.390434] amdgpu: ATOM BIOS: 113-4481LHS-UC1
>   [   15.400079] amdgpu 000d:03:00.0: amdgpu: CP RS64 enable
>   [   15.411830] amdgpu 000d:03:00.0: amdgpu: Trusted Memory Zone (TMZ) feature not supported
>   [   15.419932] amdgpu 000d:03:00.0: amdgpu: PCIE atomic ops is not supported
>   [   15.426719] [drm] GPU posting now...
>   [   15.430329] [drm] vm size is 262144 GB, 4 levels, block size is 9-bit, fragment size is 9-bit
>   [   15.438871] amdgpu 000d:03:00.0: BAR 2 [mem 0x340010000000-0x3400101fffff 64bit pref]: releasing
>   [   15.447648] amdgpu 000d:03:00.0: BAR 0 [mem 0x340000000000-0x34000fffffff 64bit pref]: releasing
>   [   15.456452] pcieport 000d:02:00.0: bridge window [mem 0x340000000000-0x340017ffffff 64bit pref]: releasing
>   [   15.466095] pcieport 000d:01:00.0: bridge window [mem 0x340000000000-0x340017ffffff 64bit pref]: releasing
>   [   15.475738] pcieport 000d:00:01.0: bridge window [mem 0x340000000000-0x340017ffffff 64bit pref]: releasing
>   [   15.485386] pcieport 000d:00:01.0: bridge window [io  0x1000-0x0fff] to [bus 01-03] add_size 1000
>   [   15.494252] pcieport 000d:00:01.0: bridge window [mem 0x340000000000-0x3402ffffffff 64bit pref]: assigned
>   [   15.503809] pcieport 000d:00:01.0: bridge window [io  size 0x1000]: can't assign; no space
>   [   15.512063] pcieport 000d:00:01.0: bridge window [io  size 0x1000]: failed to assign
>   [   15.519796] pcieport 000d:00:01.0: bridge window [io  size 0x1000]: can't assign; no space
>   [   15.528049] pcieport 000d:00:01.0: bridge window [io  size 0x1000]: failed to assign
>   [   15.535787] pcieport 000d:01:00.0: bridge window [mem 0x340000000000-0x3402ffffffff 64bit pref]: assigned
>   [   15.545349] pcieport 000d:02:00.0: bridge window [mem 0x340000000000-0x3402ffffffff 64bit pref]: assigned
>   [   15.554911] amdgpu 000d:03:00.0: BAR 0 [mem 0x340000000000-0x3401ffffffff 64bit pref]: assigned
>   [   15.563612] amdgpu 000d:03:00.0: BAR 2 [mem 0x340200000000-0x3402001fffff 64bit pref]: assigned
>   [   15.572313] pcieport 000d:00:01.0: PCI bridge to [bus 01-03]
>   [   15.577962] pcieport 000d:00:01.0:   bridge window [mem 0x50000000-0x502fffff]
>   [   15.585175] pcieport 000d:00:01.0:   bridge window [mem 0x340000000000-0x3402ffffffff 64bit pref]
>   [   15.594038] pcieport 000d:00:01.0: bridge window [mem 0x340000000000-0x340017ffffff 64bit pref]: can't claim; address conflict with PCI Bus 000d:01 [mem 0x340000000000-0x340017ffffff 64bit pref]
> 
> Failure to claim space for the bridge window...

Thanks for the report.

I was just looking at a similar oddity from another reporter and thanks 
this getting second case with an "impossible" claim conflict, I was 
finally able to zero in on a bug in the resize code which has been there 
since the introduction of the BAR resizing.

It will take a few days for me to come up fixes that do address also the
problems you'd likely hit next after this claim conflict bug is fixed.

> >From discussions with Ard it seems if the firmware had resized the BAR first,
> and then assigned the resources, there would be no issue. However there
> is no latter firmware for the platform.

We want to make kernel capable of considering BARs with their maximum 
sizes eventually so it wouldn't matter what FW does. I've been working 
towards that direction for a while now but I keep getting distracted by 
fixing all these other bugs in the existing code. :-)

> While the PCI change has provoked this regression I suspect the amdgpu code
> could handle the failure to resize the BAR better and if it can't get
> what it wants just not initialise the driver. I did hit some cases while
> bisecting where the GPU just wasn't visible.

Indeed, things could be better on multiple levels.

Also the entire pci_resize_resource() API is flawed in that it isn't 
currently able to restore all device's resources as they were in case of a 
failure. It seems I might have to fix it now as there seem no other way to 
fix this claim conflict problem.

...And fix will be a bit invasive as I need to merge 
pbus_reassign_bridge_resources() and pci_resize_resource() into a new
pci_release_and_resize_resource() API that handles rollback properly
in case of an error.

> I'm available to test patches and generate additional debug info so do
> let me know if there is anything I can do to help.

Thanks, I'll send the fix series for testing once it is ready.

--
 i.