From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6AAA6288DB; Tue, 18 Mar 2025 09:55:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742291700; cv=none; b=p+zqdeipaur33ohKksfN80miBUHC0/H1U/gCTTT8117XAQHV1Ap9lrFZnpvM73ddulC8FcRPcbZyHjbJOOpLI+HSFHqifd/2tj8DATky//PcyqG36HLSVayEje6DjV//4lfqhoOv0vVHDzFp/gDL563U897QLYBfGg3ddRWsxzQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742291700; c=relaxed/simple; bh=MMPIxNsQcdcDvT/XxJco5+7bOja52mFKmZbSLgBsJI8=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=Zz5rQJjCVKDBGbx2b5rrzTo0o9+fXijnvGXUrg0ULjrWrwgZG0lErudwdvNLQ1YuImubiM2aCqKd0fNSjgCEl1CowaRaAKEvr+8HJNpB97ttI7hI1YJN4mQDFcRetn8RLYIuw5QZ/IKv42xqxWCuSBAZb5+1mIQDCQ0ZfkKJTac= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Xpg7BhCM; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Xpg7BhCM" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 73079C4CEDD; Tue, 18 Mar 2025 09:54:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1742291700; bh=MMPIxNsQcdcDvT/XxJco5+7bOja52mFKmZbSLgBsJI8=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=Xpg7BhCMsNJ+5BhpWN2MZmwNuSLMoEAMw/OYupKD6twjduWywyPVOx6+xXLHfFe0q mPt/e4/F6v4swLbnAm/ie4cgurnTxx57sS129TLXUy3bJKnEkLyVOVElgoxc+oFmA7 QNkRmZ+jupsF9blwYloTiJ6YUap8fxk5chyqtMYHvd33dEAHqLQTGmBLijWF0kkaGO 5FbVtM9v/KD3QT2C02ds0BVbsneoWIpHR1xQ1PyC9e5CXGwE8+etmmB2oGjuH6mrF1 x7+wPPnKKcwZ3fB8OKOCBmV7lY0Z0VZDoS6wX6XyRBiakhTl2k5koJmOPKqhX58G0E oVkd7Vy4KxPRw== Message-ID: <6cbec220-5ecc-4471-b819-031673d667df@kernel.org> Date: Tue, 18 Mar 2025 10:54:53 +0100 Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 2/2] PCI: xilinx-cpm: Add support for PCIe RP PERST# signal To: Sai Krishna Musham , bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com, manivannan.sadhasivam@linaro.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, cassel@kernel.org Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, michal.simek@amd.com, bharat.kumar.gogada@amd.com, thippeswamy.havalige@amd.com References: <20250318092648.2298280-1-sai.krishna.musham@amd.com> <20250318092648.2298280-3-sai.krishna.musham@amd.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 18/03/2025 10:26, Sai Krishna Musham wrote: > const struct xilinx_cpm_variant *variant = port->variant; > + struct device *dev = port->dev; > + struct gpio_desc *reset_gpio; > + > + /* Request the GPIO for PCIe reset signal */ > + reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); > + if (IS_ERR(reset_gpio)) { > + dev_err(dev, "Failed to request reset GPIO\n"); Isn't this probe path? If not, then why? How are you going to handle deferrer probe? > + return;> + } > + > + /* Assert the reset signal */ > + gpiod_set_value(reset_gpio, 1); It was already asserted. > > - if (variant->version == CPM5NC_HOST) > + /* Assert the PCIe IP reset */ > + writel_relaxed(0x1, port->crx_base + variant->cpm_pcie_rst); > + > + /* Controller specific delay */ > + udelay(50); > + > + /* Deassert the PCIe IP reset */ > + writel_relaxed(0x0, port->crx_base + variant->cpm_pcie_rst); > + > + /* Deassert the reset signal */ > + gpiod_set_value(reset_gpio, 0); > + mdelay(PCIE_T_RRS_READY_MS); > + > + if (variant->version == CPM5NC_HOST) { > + /* Clear Firewall */ > + writel_relaxed(0x00, port->cpm5nc_base + > + XILINX_CPM5NC_PCIE0_FW); > + writel_relaxed(0x01, port->cpm5nc_base + > + XILINX_CPM5NC_PCIE0_FW); > + writel_relaxed(0x00, port->cpm5nc_base + > + XILINX_CPM5NC_PCIE0_FW); > return; > + } > > if (cpm_pcie_link_up(port)) > dev_info(port->dev, "PCIe Link is UP\n"); > @@ -551,6 +598,19 @@ static int xilinx_cpm_pcie_parse_dt(struct xilinx_cpm_pcie *port, > port->reg_base = port->cfg->win; > } > > + port->crx_base = devm_platform_ioremap_resource_byname(pdev, > + "cpm_crx"); And here is the actual ABI break. > + if (IS_ERR(port->crx_base)) > + return PTR_ERR(port->crx_base); Best regards, Krzysztof