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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ab6760fc485sm764439766b.160.2025.01.28.03.38.06 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 28 Jan 2025 03:38:08 -0800 (PST) Message-ID: <772b211d-ca23-4810-8d92-a67892da4fbf@oss.qualcomm.com> Date: Tue, 28 Jan 2025 12:38:05 +0100 Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 3/4] arm64: dts: qcom: ipq5424: Add PCIe PHYs and controller nodes To: Manikanta Mylavarapu , andersson@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, lpieralisi@kernel.org, kw@linux.com, manivannan.sadhasivam@linaro.org, bhelgaas@google.com, konradybcio@kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Cc: quic_srichara@quicinc.com, quic_varada@quicinc.com References: <20250125035920.2651972-1-quic_mmanikan@quicinc.com> <20250125035920.2651972-4-quic_mmanikan@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250125035920.2651972-4-quic_mmanikan@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: rjvUYYavhN2bOgZhuMtjhPpGwudpmd2X X-Proofpoint-ORIG-GUID: rjvUYYavhN2bOgZhuMtjhPpGwudpmd2X X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-01-28_04,2025-01-27_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 malwarescore=0 suspectscore=0 bulkscore=0 spamscore=0 mlxscore=0 impostorscore=0 adultscore=0 mlxlogscore=663 lowpriorityscore=0 priorityscore=1501 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2501280090 On 25.01.2025 4:59 AM, Manikanta Mylavarapu wrote: > Add PCIe0, PCIe1, PCIe2, PCIe3 (and corresponding PHY) devices > found on IPQ5424 platform. The PCIe0 & PCIe1 are 1-lane Gen3 > host whereas PCIe2 & PCIe3 are 2-lane Gen3 host. > > Signed-off-by: Manikanta Mylavarapu > --- > Changes in V3: > - Replace all instances of ‘0’ with ‘0x0’ wherever applicable in > PCIe nodes. > - Place both compatible entries in a single line for each PCIe > controller node. > - Global interrupt is defined for each PCIe controller node. > - Remove all clocks except the RCHNG clock from the assigned-clocks. > - ICC tag is defined for the interconnect path of each pcie controller > node. This one is wrong, please undo.. Konrad