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X-CSE-ConnectionGUID: a+7vuGvyRJOcrMuf1kUm6Q== X-CSE-MsgGUID: sH9E2Ra4SN+BZSckzE5A4g== X-IronPort-AV: E=McAfee;i="6800,10657,11467"; a="63018515" X-IronPort-AV: E=Sophos;i="6.16,243,1744095600"; d="scan'208";a="63018515" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by fmvoesa103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Jun 2025 09:08:29 -0700 X-CSE-ConnectionGUID: IxbxU0ZNQ1aN1ZpkTN73XQ== X-CSE-MsgGUID: 02+xtRrdS46bfBcK2NodMA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.16,243,1744095600"; d="scan'208";a="153773404" Received: from spandruv-desk1.amr.corp.intel.com (HELO [10.125.108.59]) ([10.125.108.59]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Jun 2025 09:08:28 -0700 Message-ID: <79e86754-710a-4335-8a09-a756201f7ae4@intel.com> Date: Tue, 17 Jun 2025 09:08:27 -0700 Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v9 04/16] PCI/AER: Dequeue forwarded CXL error To: Lukas Wunner , "Bowman, Terry" Cc: dave@stgolabs.net, jonathan.cameron@huawei.com, alison.schofield@intel.com, vishal.l.verma@intel.com, ira.weiny@intel.com, dan.j.williams@intel.com, bhelgaas@google.com, bp@alien8.de, ming.li@zohomail.com, shiju.jose@huawei.com, dan.carpenter@linaro.org, Smita.KoralahalliChannabasappa@amd.com, kobayashi.da-06@fujitsu.com, rrichter@amd.com, peterz@infradead.org, fabio.m.de.francesco@linux.intel.com, ilpo.jarvinen@linux.intel.com, yazen.ghannam@amd.com, linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org References: <20250603172239.159260-1-terry.bowman@amd.com> <20250603172239.159260-5-terry.bowman@amd.com> Content-Language: en-US From: Dave Jiang In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 6/10/25 9:38 PM, Lukas Wunner wrote: > On Tue, Jun 10, 2025 at 04:20:53PM -0500, Bowman, Terry wrote: >> On 6/10/2025 1:07 PM, Bowman, Terry wrote: >>> On 6/9/2025 11:15 PM, Lukas Wunner wrote: >>>> On Tue, Jun 03, 2025 at 12:22:27PM -0500, Terry Bowman wrote: >>>>> --- a/drivers/cxl/core/ras.c >>>>> +++ b/drivers/cxl/core/ras.c >>>>> +static int cxl_rch_handle_error_iter(struct pci_dev *pdev, void *data) >>>>> +{ >>>>> + struct cxl_prot_error_info *err_info = data; >>>>> + struct pci_dev *pdev_ref __free(pci_dev_put) = pci_dev_get(pdev); >>>>> + struct cxl_dev_state *cxlds; >>>>> + >>>>> + /* >>>>> + * The capability, status, and control fields in Device 0, >>>>> + * Function 0 DVSEC control the CXL functionality of the >>>>> + * entire device (CXL 3.0, 8.1.3). >>>>> + */ >>>>> + if (pdev->devfn != PCI_DEVFN(0, 0)) >>>>> + return 0; >>>>> + >>>>> + /* >>>>> + * CXL Memory Devices must have the 502h class code set (CXL >>>>> + * 3.0, 8.1.12.1). >>>>> + */ >>>>> + if ((pdev->class >> 8) != PCI_CLASS_MEMORY_CXL) >>>>> + return 0; >>>>> + >>>>> + if (!is_cxl_memdev(&pdev->dev) || !pdev->dev.driver) >>>>> + return 0; >>>> >>>> Is the point of the "!pdev->dev.driver" check to ascertain that >>>> pdev is bound to cxl_pci_driver? >>>> >>>> If so, you need to check "if (pdev->driver != &cxl_pci_driver)" >>>> directly (like cxl_handle_cper_event() does). >>>> >>>> That's because there are drivers which may bind to *any* PCI device, >>>> e.g. vfio_pci_driver. >> >> Looking closer to implement this change I find the cxl_pci_driver is >> defined static in cxl/pci.c and is unavailable to reference in >> cxl/core/ras.c as-is. Would you like me to export cxl_pci_driver to >> make available for this check? > > I'm not sure you need an export. The consumer you're introducing > is located in core/ras.c, which is always built-in, never modular, > hence just making it non-static and adding a declaration to cxlpci.h > may be sufficient. > > An alternative would be to keep it static, but add a non-static helper > cxl_pci_drv_bound() or something like that. > > I'm passing the buck to CXL maintainers for this. :) I don't have a good solution to this. Moving the declaration of cxl_pci driver to core would be pretty messy. Perhaps doing the dance of calling try_module_get() is less messy? Or maybe Dan has a better idea.... DJ > >> The existing class code check guarantees it is a CXL EP. Is it not >> safe to expect it is bound to a the CXL driver? > > Just checking for the pci_dev being bound seems insufficient to me > because of the vfio_pci_driver case and potentially others. > > HTH, > > Lukas >