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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aa20e0812aesm286231166b.176.2024.11.16.02.59.39 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 16 Nov 2024 02:59:41 -0800 (PST) Message-ID: <7dd7ecd2-c8a1-4800-8746-2b6166d3ae1c@oss.qualcomm.com> Date: Sat, 16 Nov 2024 11:59:38 +0100 Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/4] PCI: of: Add API to retrieve equalization presets from device tree To: Krishna chaitanya chundru , quic_mrana@quicinc.com, quic_vbadigan@quicinc.com, kernel@quicinc.com, Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Helgaas , Jingoo Han , Manivannan Sadhasivam , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org References: <20241116-presets-v1-0-878a837a4fee@quicinc.com> <20241116-presets-v1-2-878a837a4fee@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20241116-presets-v1-2-878a837a4fee@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: hjwxksxVXMECz7jXR0b2aeeJl1v3RFT1 X-Proofpoint-ORIG-GUID: hjwxksxVXMECz7jXR0b2aeeJl1v3RFT1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 priorityscore=1501 mlxscore=0 impostorscore=0 clxscore=1015 malwarescore=0 adultscore=0 suspectscore=0 mlxlogscore=999 phishscore=0 lowpriorityscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411160093 On 16.11.2024 2:37 AM, Krishna chaitanya chundru wrote: > PCIe equalization presets are predefined settings used to optimize > signal integrity by compensating for signal loss and distortion in > high-speed data transmission. > > As per PCIe spec 6.0.1 revision section 8.3.3.3 & 4.2.4 for data rates > of 8.0 GT/s, 16.0 GT/s, 32.0 GT/s, and 64.0 GT/s, there is a way to > configure lane equalization presets for each lane to enhance the PCIe > link reliability. Each preset value represents a different combination > of pre-shoot and de-emphasis values. For each data rate, different > registers are defined: for 8.0 GT/s, registers are defined in section > 7.7.3.4; for 16.0 GT/s, in section 7.7.5.9, etc. The 8.0 GT/s rate has > an extra receiver preset hint, requiring 16 bits per lane, while the > remaining data rates use 8 bits per lane. > > Based on the number of lanes and the supported data rate, this function > reads the device tree property and stores in the presets structure. > > Signed-off-by: Krishna chaitanya chundru > --- > drivers/pci/of.c | 62 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ > drivers/pci/pci.h | 17 +++++++++++++-- > 2 files changed, 77 insertions(+), 2 deletions(-) > > diff --git a/drivers/pci/of.c b/drivers/pci/of.c > index dacea3fc5128..0d37bc231956 100644 > --- a/drivers/pci/of.c > +++ b/drivers/pci/of.c > @@ -826,3 +826,65 @@ u32 of_pci_get_slot_power_limit(struct device_node *node, > return slot_power_limit_mw; > } > EXPORT_SYMBOL_GPL(of_pci_get_slot_power_limit); > + > +int of_pci_get_equalization_presets(struct device *dev, > + struct pci_eq_presets *presets, > + int num_lanes) > +{ > + int ret; > + > + if (of_property_present(dev->of_node, "eq-presets-8gts")) { > + presets->eq_presets_8gts = devm_kzalloc(dev, sizeof(u16) * num_lanes, GFP_KERNEL); > + if (!presets->eq_presets_8gts) If you make this an array with enum indices, you can make a for loop and read "eq-presets-%ugts", (8 << i) Konrad