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Wed, 28 Jan 2026 21:39:04 -0800 (PST) X-Received: by 2002:a05:6a00:9a6:b0:81f:a85e:a627 with SMTP id d2e1a72fcca58-8236917dcd2mr7727702b3a.27.1769665143884; Wed, 28 Jan 2026 21:39:03 -0800 (PST) Received: from [10.218.35.45] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-82379c5a190sm4725770b3a.68.2026.01.28.21.38.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 28 Jan 2026 21:39:03 -0800 (PST) Message-ID: <832e8ea4-2b85-4513-a285-9d4ab1dd66b0@oss.qualcomm.com> Date: Thu, 29 Jan 2026 11:08:57 +0530 Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/3] PCI: host-common: Add shared D3cold eligibility helper for host bridges To: Bjorn Andersson Cc: Jingoo Han , Manivannan Sadhasivam , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Will Deacon , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, jonathanh@nvidia.com References: <20260128-d3cold-v1-0-dd8f3f0ce824@oss.qualcomm.com> <20260128-d3cold-v1-1-dd8f3f0ce824@oss.qualcomm.com> Content-Language: en-US From: Krishna Chaitanya Chundru In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=d7T4CBjE c=1 sm=1 tr=0 ts=697af279 cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=kJBpcOZ6olZWUerAqwAA:9 a=QEXdDO2ut3YA:10 a=-_B0kFfA75AA:10 a=OpyuDcXvxspvyRM73sMx:22 X-Proofpoint-GUID: YOKhlgjZ96oP8jLLuca0TsnvWOxH5pZ_ X-Proofpoint-ORIG-GUID: YOKhlgjZ96oP8jLLuca0TsnvWOxH5pZ_ X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI5MDAzMyBTYWx0ZWRfXxKd7+qJO6ocz 5CwdjnGx/ZHxNf8/7tPfy/l2Z4If4JsDWKYp0DLJWn9UEF9sEQVVgwbsJiN4bLURV8LMK+GyqWG E36PLxwX/ml5tLarvN3me30BU+2ezXFkSJiDE+l8qytXWhrNU0QQiHCigmJ0KH6sVA1UX1ZFl07 yfNLMDJ7BbvqO6YEevOPFjvon5aac6ehAiFuuWEo/Y/RZ3v2RepeuQKA6npbUUFv5x7SNL+C6+S hReVX8lXSaQ5dKGoIv8ftJdncC3Cjjo3shW8uX8co1/cUKETYRqqwHRBVMxk7lpXplC8NTqXRcX i34qTZGyTFII0qChATPGN8k6+2QiJ8RYN1G5zvUP1MuDHHRoR0oJ9svh/INemna6lexaqDzb8U1 Prnj8GqN4lJFwhQeDDfTq2ak+ROpEevP3cHjt0LlVAYkqNyUk3S2JLgXJghNjf7mWh3rEw0/gQI NLs10kigGMpQqPgpAag== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-01-28_06,2026-01-28_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 lowpriorityscore=0 suspectscore=0 adultscore=0 malwarescore=0 impostorscore=0 bulkscore=0 spamscore=0 clxscore=1015 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601290033 On 1/28/2026 7:56 PM, Bjorn Andersson wrote: > On Wed, Jan 28, 2026 at 05:10:41PM +0530, Krishna Chaitanya Chundru wrote: >> Add a common helper, pci_host_common_can_enter_d3cold(), to determine >> whether a PCI host bridge can safely transition to D3cold. > Please read https://docs.kernel.org/process/submitting-patches.html#describe-your-changes > > It clearly says that you're supposed to start your commit message with a > description of the problem you're solving. In fact, even after reading > the entire commit message a few times I only know what the patch does, > but it's not clear to me why this patch exists. > >> The helper walks all devices on the bridge's bus and only allows the >> host bridge to enter D3cold if all PCIe endpoints are already in >> PCI_D3hot. > The code below does walk the bus, but it doesn't allow/disallow anything > as far as I can tell, it queries their type, state, and if they are wake > capable? > >> For devices that may wake the system, it additionally >> requires that the device supports PME wakeup from D3cold(with WAKE#). >> Devices without wakeup enabled are not restricted by this check and can >> be allowed to keep device in D3cold. >> > Again, this code doesn't perform any action, it doesn't > allow/disallow/restrict the devices from doing anything, it merely > queries a bunch of things across all devices, and the commit message > fails to capture why this is useful. This is a helper function used by controller drivers, to know if the controller driver can keep in D3cold state or not. we use endpoint states and their wakeup capability support to determine d3cold can be supported or not. The return value of this function will tell controller drivers to know if we can allow D3cold or not. >> Signed-off-by: Krishna Chaitanya Chundru >> --- >> drivers/pci/controller/pci-host-common.c | 29 +++++++++++++++++++++++++++++ >> drivers/pci/controller/pci-host-common.h | 2 ++ >> 2 files changed, 31 insertions(+) >> >> diff --git a/drivers/pci/controller/pci-host-common.c b/drivers/pci/controller/pci-host-common.c >> index c473e7c03bacad2de07c798768f99652443431e0..225472c5ac82c6c5b44257d68a0fc503ec046ff1 100644 >> --- a/drivers/pci/controller/pci-host-common.c >> +++ b/drivers/pci/controller/pci-host-common.c >> @@ -106,5 +106,34 @@ void pci_host_common_remove(struct platform_device *pdev) >> } >> EXPORT_SYMBOL_GPL(pci_host_common_remove); >> >> +static int pci_host_common_check_d3cold(struct pci_dev *pdev, void *userdata) >> +{ >> + bool *d3cold_allow = userdata; >> + >> + if (pci_pcie_type(pdev) != PCI_EXP_TYPE_ENDPOINT) >> + return 0; >> + >> + if (pdev->current_state != PCI_D3hot) >> + goto exit; >> + >> + if (device_may_wakeup(&pdev->dev) && !pci_pme_capable(pdev, PCI_D3cold)) >> + goto exit; >> + >> + return 0; >> +exit: >> + *d3cold_allow = false; >> + return -EBUSY; >> +} >> + >> +bool pci_host_common_can_enter_d3cold(struct pci_host_bridge *bridge) > Please add kernel-doc for any EXPORT_SYMBOL() functions, so that it's > clear to the next guy what the API does. Initially, I had a change in my workspace which has kernel-doc, but after seeing this file I see none of the exported API's had a kernel-doc. Following it I dropped the kernel -doc at last minute. I will add this in v2. - Krishna Chaitanya. > > Regards, > Bjorn > >> +{ >> + bool d3cold_allow = true; >> + >> + pci_walk_bus(bridge->bus, pci_host_common_check_d3cold, &d3cold_allow); >> + >> + return d3cold_allow; >> +} >> +EXPORT_SYMBOL_GPL(pci_host_common_can_enter_d3cold); >> + >> MODULE_DESCRIPTION("Common library for PCI host controller drivers"); >> MODULE_LICENSE("GPL v2"); >> diff --git a/drivers/pci/controller/pci-host-common.h b/drivers/pci/controller/pci-host-common.h >> index b5075d4bd7eb31fbf1dc946ef1a6afd5afb5b3c6..18a731bca058828340bca84776d0e91da1edbbf7 100644 >> --- a/drivers/pci/controller/pci-host-common.h >> +++ b/drivers/pci/controller/pci-host-common.h >> @@ -20,4 +20,6 @@ void pci_host_common_remove(struct platform_device *pdev); >> >> struct pci_config_window *pci_host_common_ecam_create(struct device *dev, >> struct pci_host_bridge *bridge, const struct pci_ecam_ops *ops); >> + >> +bool pci_host_common_can_enter_d3cold(struct pci_host_bridge *bridge); >> #endif >> >> -- >> 2.34.1 >> >>