From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E6B05C433C1 for ; Thu, 25 Mar 2021 17:09:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C3699619F3 for ; Thu, 25 Mar 2021 17:09:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229869AbhCYRIc (ORCPT ); Thu, 25 Mar 2021 13:08:32 -0400 Received: from mail.kernel.org ([198.145.29.99]:39560 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229940AbhCYRIR (ORCPT ); Thu, 25 Mar 2021 13:08:17 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id E1791619C2; Thu, 25 Mar 2021 17:08:16 +0000 (UTC) Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94) (envelope-from ) id 1lPTSw-003n47-M2; Thu, 25 Mar 2021 17:08:14 +0000 Date: Thu, 25 Mar 2021 17:08:13 +0000 Message-ID: <8735wjrwjm.wl-maz@kernel.org> From: Marc Zyngier To: Megha Dey Cc: tglx@linutronix.de, linux-kernel@vger.kernel.org, dave.jiang@intel.com, ashok.raj@intel.com, kevin.tian@intel.com, dwmw@amazon.co.uk, x86@kernel.org, tony.luck@intel.com, dan.j.williams@intel.com, jgg@mellanox.com, kvm@vger.kernel.org, iommu@lists.linux-foundation.org, alex.williamson@redhat.com, bhelgaas@google.com, linux-pci@vger.kernel.org, baolu.lu@linux.intel.com, ravi.v.shankar@intel.com Subject: Re: [Patch V2 07/13] irqdomain/msi: Provide msi_alloc/free_store() callbacks In-Reply-To: <1614370277-23235-8-git-send-email-megha.dey@intel.com> References: <1614370277-23235-1-git-send-email-megha.dey@intel.com> <1614370277-23235-8-git-send-email-megha.dey@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: megha.dey@intel.com, tglx@linutronix.de, linux-kernel@vger.kernel.org, dave.jiang@intel.com, ashok.raj@intel.com, kevin.tian@intel.com, dwmw@amazon.co.uk, x86@kernel.org, tony.luck@intel.com, dan.j.williams@intel.com, jgg@mellanox.com, kvm@vger.kernel.org, iommu@lists.linux-foundation.org, alex.williamson@redhat.com, bhelgaas@google.com, linux-pci@vger.kernel.org, baolu.lu@linux.intel.com, ravi.v.shankar@intel.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Fri, 26 Feb 2021 20:11:11 +0000, Megha Dey wrote: > > From: Thomas Gleixner > > For devices which don't have a standard storage for MSI messages like the > upcoming IMS (Interrupt Message Store) it's required to allocate storage > space before allocating interrupts and after freeing them. > > This could be achieved with the existing callbacks, but that would be > awkward because they operate on msi_alloc_info_t which is not uniform > across architectures. Also these callbacks are invoked per interrupt but > the allocation might have bulk requirements depending on the device. > > As such devices can operate on different architectures it is simpler to > have separate callbacks which operate on struct device. The resulting > storage information has to be stored in struct msi_desc so the underlying > irq chip implementation can retrieve it for the relevant operations. > > Reviewed-by: Tony Luck > Signed-off-by: Thomas Gleixner > Signed-off-by: Megha Dey > --- > include/linux/msi.h | 8 ++++++++ > kernel/irq/msi.c | 11 +++++++++++ > 2 files changed, 19 insertions(+) > > diff --git a/include/linux/msi.h b/include/linux/msi.h > index 46e879c..e915932 100644 > --- a/include/linux/msi.h > +++ b/include/linux/msi.h > @@ -323,6 +323,10 @@ struct msi_domain_info; > * function. > * @domain_free_irqs: Optional function to override the default free > * function. > + * @msi_alloc_store: Optional callback to allocate storage in a device > + * specific non-standard MSI store > + * @msi_alloc_free: Optional callback to free storage in a device > + * specific non-standard MSI store > * > * @get_hwirq, @msi_init and @msi_free are callbacks used by > * msi_create_irq_domain() and related interfaces > @@ -372,6 +376,10 @@ struct msi_domain_ops { > struct device *dev, int nvec); > void (*domain_free_irqs)(struct irq_domain *domain, > struct device *dev); > + int (*msi_alloc_store)(struct irq_domain *domain, > + struct device *dev, int nvec); > + void (*msi_free_store)(struct irq_domain *domain, > + struct device *dev); > }; > > /** > diff --git a/kernel/irq/msi.c b/kernel/irq/msi.c > index c54316d..047b59d 100644 > --- a/kernel/irq/msi.c > +++ b/kernel/irq/msi.c > @@ -434,6 +434,12 @@ int __msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, > if (ret) > return ret; > > + if (ops->msi_alloc_store) { > + ret = ops->msi_alloc_store(domain, dev, nvec); What is supposed to happen if we get aliasing devices (similar to what we have with devices behind a PCI bridge)? The ITS code goes through all kind of hoops to try and detect this case when sizing the translation tables (in the .prepare callback), and I have the feeling that sizing the message store is analogous. Or do we all have the warm fuzzy feeling that aliasing is a thing of the past and that we can ignore this potential problem? Thanks, M. -- Without deviation from the norm, progress is not possible.