RE: [patch V2 31/33] iommu/vt-d: Enable PCI/IMS

Tian, Kevin
2022-11-24T03:17:10Z

> From: Thomas Gleixner <tglx@linutronix.de>
> Sent: Monday, November 21, 2022 10:38 PM
>
> PCI/IMS works like PCI/MSI-X in the remapping. Just add the feature flag.
>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
> drivers/iommu/intel/irq_remapping.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> --- a/drivers/iommu/intel/irq_remapping.c
> +++ b/drivers/iommu/intel/irq_remapping.c
> @@ -1429,7 +1429,9 @@ static const struct irq_domain_ops intel
> };
>
> static const struct msi_parent_ops dmar_msi_parent_ops = {
> - .supported_flags = X86_VECTOR_MSI_FLAGS_SUPPORTED |
> MSI_FLAG_MULTI_PCI_MSI,
> + .supported_flags = X86_VECTOR_MSI_FLAGS_SUPPORTED |
> + MSI_FLAG_MULTI_PCI_MSI |
> + MSI_FLAG_PCI_IMS,
> .prefix = "IR-",
> .init_dev_msi_info = msi_parent_init_dev_msi_info,
> };

vIR is already available on vIOMMU today [1].

Fortunately both intel/amd IOMMU has a way to detect whether it's a vIOMMU.

For intel it's cap_caching_mode().

For AMD it's amd_iommu_np_cache.

Then MSI_FLAG_PCI_IMS should be set only on physical IOMMU.

In the future once we have hypercall then it can be set on vIOMMU too.

[1] https://lore.kernel.org/all/BL1PR11MB5271326D39DAB692F07587768C739@BL1PR11MB5271.namprd11.prod.outlook.com/