linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Thomas Gleixner <tglx@linutronix.de>
To: Stefan Roese <sr@denx.de>, linux-pci@vger.kernel.org
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	Michal Simek <michal.simek@xilinx.com>,
	Marek Vasut <marex@denx.de>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Subject: Re: [RFC PATCH] PCI/MSI: Only mask all MSI-X entries when MSI-X is used
Date: Sat, 11 Dec 2021 22:02:46 +0100	[thread overview]
Message-ID: <87tufevoqx.ffs@tglx> (raw)
In-Reply-To: <ee612558-18e6-1ef0-3a48-7a971fdd57f2@denx.de>

Stefan,

On Sat, Dec 11 2021 at 14:58, Stefan Roese wrote:
> On 12/11/21 11:17, Thomas Gleixner wrote:
>> Can you try the patch below?
>
> Sure, please see below.
>
>> It might still be that this Marvell part really combines the per entry
>> mask bits from MSI-X with MSI, then we need both.
>
> With your patch applied only (mine not), the Masked+ is gone but still
> the MSI interrupts are not received in the system. So you seem to have
> guessed correctly, that we need both changes.

Groan. How is that device specification compliant?

Vector Control for MSI-X Table Entries
--------------------------------------

"00: Mask bit:  When this bit is set, the function is prohibited from
                sending a message using this MSI-X Table entry.
                ....
                This bit’s state after reset is 1 (entry is masked)."

So how can that work in the first place if that device is PCI
specification compliant? Seems that PCI/SIG compliance program is just
another rubberstamping nonsense.

Can someone who has access to that group please ask them what their
specification compliance stuff is actualy testing?

Sure, that went unnoticed so far on that marvelous device because the
kernel was missing a defense line, but sigh...

> How to continue? Should I integrate your patch into mine and send a new
> version? Or will you send it separately to the list for integration?

Your patch is incomplete. The function can fail later on, which results
in the same problem, no?

So we need something like the below.

Just to satisfy my curiosity:

  The device supports obviously MSI-X, which is preferred over MSI.

  So why is the MSI-X initialization failing in the first place on this
  platform?

Thanks,

        tglx
---
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -722,9 +722,6 @@ static int msix_capability_init(struct p
 		goto out_disable;
 	}
 
-	/* Ensure that all table entries are masked. */
-	msix_mask_all(base, tsize);
-
 	ret = msix_setup_entries(dev, base, entries, nvec, affd);
 	if (ret)
 		goto out_disable;
@@ -751,6 +748,9 @@ static int msix_capability_init(struct p
 	/* Set MSI-X enabled bits and unmask the function */
 	pci_intx_for_msi(dev, 0);
 	dev->msix_enabled = 1;
+
+	/* Ensure that all table entries are masked. */
+	msix_mask_all(base, tsize);
 	pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_MASKALL, 0);
 
 	pcibios_free_irq(dev);
@@ -777,7 +777,7 @@ static int msix_capability_init(struct p
 	free_msi_irqs(dev);
 
 out_disable:
-	pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0);
+	pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_MASKALL | PCI_MSIX_FLAGS_ENABLE, 0);
 
 	return ret;
 }

  reply	other threads:[~2021-12-11 21:02 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-10 16:10 [RFC PATCH] PCI/MSI: Only mask all MSI-X entries when MSI-X is used Stefan Roese
2021-12-11 10:17 ` Thomas Gleixner
2021-12-11 13:58   ` Stefan Roese
2021-12-11 21:02     ` Thomas Gleixner [this message]
2021-12-14 11:10       ` Stefan Roese
2021-12-14 12:28       ` [tip: irq/urgent] PCI/MSI: Clear PCI_MSIX_FLAGS_MASKALL on error tip-bot2 for Thomas Gleixner
2021-12-14 12:28 ` [tip: irq/urgent] PCI/MSI: Mask MSI-X vectors only on success tip-bot2 for Stefan Roese
2022-03-14 16:36   ` Jeremi Piotrowski
2022-03-14 16:49     ` Stefan Roese
2022-03-14 17:04       ` Dusty Mabe
2022-03-14 20:29         ` Jeremi Piotrowski
2022-04-27  7:59           ` Salvatore Bonaccorso
2022-04-27 17:35             ` Thomas Gleixner
2022-04-28 13:48               ` Thomas Gleixner
2022-04-28 13:50                 ` [PATCH] x86/pci/xen: Disable PCI/MSI[-X] masking for XEN_HVM guests Thomas Gleixner
2022-04-28 18:43                 ` [tip: irq/urgent] PCI/MSI: Mask MSI-X vectors only on success Salvatore Bonaccorso
2022-04-29  6:37                   ` Salvatore Bonaccorso

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87tufevoqx.ffs@tglx \
    --to=tglx@linutronix.de \
    --cc=bhelgaas@google.com \
    --cc=gregkh@linuxfoundation.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=marex@denx.de \
    --cc=michal.simek@xilinx.com \
    --cc=sr@denx.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).