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Signed-off-by: Jason Gunthorpe --- drivers/pci/quirks.c | 36 ++++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index d78876b4a2b106..71b9550e46eb06 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -4627,20 +4627,20 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CHELSIO, PCI_ANY_ID, * in @acs_ctrl_ena, i.e., the device provides all the access controls the * caller desires. Return 0 otherwise. */ -static int pci_acs_ctrl_enabled(u16 acs_ctrl_req, u16 acs_ctrl_ena) +static int pci_acs_ctrl_enabled(u32 acs_ctrl_req, u32 acs_ctrl_ena) { if ((acs_ctrl_req & acs_ctrl_ena) == acs_ctrl_req) return 1; return 0; } -static int pci_acs_ctrl_isolated(u16 acs_flags) +static int pci_acs_ctrl_isolated(u32 acs_flags) { return pci_acs_ctrl_enabled(acs_flags, PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF); } -static int pci_quirk_mf_endpoint_acs(struct pci_dev *dev, u16 acs_flags); +static int pci_quirk_mf_endpoint_acs(struct pci_dev *dev, u32 acs_flags); /* * AMD has indicated that the devices below do not support peer-to-peer @@ -4667,7 +4667,7 @@ static int pci_quirk_mf_endpoint_acs(struct pci_dev *dev, u16 acs_flags); * 1022:780f [AMD] FCH PCI Bridge * 1022:7809 [AMD] FCH USB OHCI Controller */ -static int pci_quirk_amd_sb_acs(struct pci_dev *dev, u16 acs_flags) +static int pci_quirk_amd_sb_acs(struct pci_dev *dev, u32 acs_flags) { #ifdef CONFIG_ACPI struct acpi_table_header *header = NULL; @@ -4709,7 +4709,7 @@ static bool pci_quirk_cavium_acs_match(struct pci_dev *dev) } } -static int pci_quirk_cavium_acs(struct pci_dev *dev, u16 acs_flags) +static int pci_quirk_cavium_acs(struct pci_dev *dev, u32 acs_flags) { if (!pci_quirk_cavium_acs_match(dev)) return -ENOTTY; @@ -4725,7 +4725,7 @@ static int pci_quirk_cavium_acs(struct pci_dev *dev, u16 acs_flags) return pci_acs_ctrl_isolated(acs_flags); } -static int pci_quirk_xgene_acs(struct pci_dev *dev, u16 acs_flags) +static int pci_quirk_xgene_acs(struct pci_dev *dev, u32 acs_flags) { /* * X-Gene Root Ports matching this quirk do not allow peer-to-peer @@ -4740,7 +4740,7 @@ static int pci_quirk_xgene_acs(struct pci_dev *dev, u16 acs_flags) * But the implementation could block peer-to-peer transactions between them * and provide ACS-like functionality. */ -static int pci_quirk_zhaoxin_pcie_ports_acs(struct pci_dev *dev, u16 acs_flags) +static int pci_quirk_zhaoxin_pcie_ports_acs(struct pci_dev *dev, u32 acs_flags) { if (!pci_is_pcie(dev) || ((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) && @@ -4810,7 +4810,7 @@ static bool pci_quirk_intel_pch_acs_match(struct pci_dev *dev) return false; } -static int pci_quirk_intel_pch_acs(struct pci_dev *dev, u16 acs_flags) +static int pci_quirk_intel_pch_acs(struct pci_dev *dev, u32 acs_flags) { if (!pci_quirk_intel_pch_acs_match(dev)) return -ENOTTY; @@ -4831,7 +4831,7 @@ static int pci_quirk_intel_pch_acs(struct pci_dev *dev, u16 acs_flags) * Port to pass traffic to another Root Port. All PCIe transactions are * terminated inside the Root Port. */ -static int pci_quirk_qcom_rp_acs(struct pci_dev *dev, u16 acs_flags) +static int pci_quirk_qcom_rp_acs(struct pci_dev *dev, u32 acs_flags) { return pci_acs_ctrl_isolated(acs_flags); } @@ -4842,12 +4842,12 @@ static int pci_quirk_qcom_rp_acs(struct pci_dev *dev, u16 acs_flags) * and validate bus numbers in requests, but does not provide an ACS * capability. */ -static int pci_quirk_nxp_rp_acs(struct pci_dev *dev, u16 acs_flags) +static int pci_quirk_nxp_rp_acs(struct pci_dev *dev, u32 acs_flags) { return pci_acs_ctrl_isolated(acs_flags); } -static int pci_quirk_al_acs(struct pci_dev *dev, u16 acs_flags) +static int pci_quirk_al_acs(struct pci_dev *dev, u32 acs_flags) { if (pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) return -ENOTTY; @@ -4925,7 +4925,7 @@ static bool pci_quirk_intel_spt_pch_acs_match(struct pci_dev *dev) #define INTEL_SPT_ACS_CTRL (PCI_ACS_CAP + 4) -static int pci_quirk_intel_spt_pch_acs(struct pci_dev *dev, u16 acs_flags) +static int pci_quirk_intel_spt_pch_acs(struct pci_dev *dev, u32 acs_flags) { int pos; u32 cap, ctrl; @@ -4946,7 +4946,7 @@ static int pci_quirk_intel_spt_pch_acs(struct pci_dev *dev, u16 acs_flags) return pci_acs_ctrl_enabled(acs_flags, ctrl); } -static int pci_quirk_mf_endpoint_acs(struct pci_dev *dev, u16 acs_flags) +static int pci_quirk_mf_endpoint_acs(struct pci_dev *dev, u32 acs_flags) { /* * SV, TB, and UF are not relevant to multifunction endpoints. @@ -4962,7 +4962,7 @@ static int pci_quirk_mf_endpoint_acs(struct pci_dev *dev, u16 acs_flags) PCI_ACS_CR | PCI_ACS_UF | PCI_ACS_DT); } -static int pci_quirk_rciep_acs(struct pci_dev *dev, u16 acs_flags) +static int pci_quirk_rciep_acs(struct pci_dev *dev, u32 acs_flags) { /* * Intel RCiEP's are required to allow p2p only on translated @@ -4975,7 +4975,7 @@ static int pci_quirk_rciep_acs(struct pci_dev *dev, u16 acs_flags) return pci_acs_ctrl_isolated(acs_flags); } -static int pci_quirk_brcm_acs(struct pci_dev *dev, u16 acs_flags) +static int pci_quirk_brcm_acs(struct pci_dev *dev, u32 acs_flags) { /* * iProc PAXB Root Ports don't advertise an ACS capability, but @@ -4986,7 +4986,7 @@ static int pci_quirk_brcm_acs(struct pci_dev *dev, u16 acs_flags) return pci_acs_ctrl_isolated(acs_flags); } -static int pci_quirk_loongson_acs(struct pci_dev *dev, u16 acs_flags) +static int pci_quirk_loongson_acs(struct pci_dev *dev, u32 acs_flags) { /* * Loongson PCIe Root Ports don't advertise an ACS capability, but @@ -5006,7 +5006,7 @@ static int pci_quirk_loongson_acs(struct pci_dev *dev, u16 acs_flags) * RP1000/RP2000 10G NICs(sp). * FF5xxx 40G/25G/10G NICs(aml). */ -static int pci_quirk_wangxun_nic_acs(struct pci_dev *dev, u16 acs_flags) +static int pci_quirk_wangxun_nic_acs(struct pci_dev *dev, u32 acs_flags) { switch (dev->device) { case 0x0100 ... 0x010F: /* EM */ @@ -5022,7 +5022,7 @@ static int pci_quirk_wangxun_nic_acs(struct pci_dev *dev, u16 acs_flags) static const struct pci_dev_acs_enabled { u16 vendor; u16 device; - int (*acs_enabled)(struct pci_dev *dev, u16 acs_flags); + int (*acs_enabled)(struct pci_dev *dev, u32 acs_flags); } pci_dev_acs_enabled[] = { { PCI_VENDOR_ID_ATI, 0x4385, pci_quirk_amd_sb_acs }, { PCI_VENDOR_ID_ATI, 0x439c, pci_quirk_amd_sb_acs }, -- 2.43.0