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Content-Language: en-US To: Shlomo Pongratz , CC: , , , , , , Shlomo Pongratz References: <20220410105213.690-1-shlomop@pliops.com> <20220410105213.690-2-shlomop@pliops.com> From: Maor Gottlieb In-Reply-To: <20220410105213.690-2-shlomop@pliops.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: ecd38037-4545-4967-c3be-08da1bc4213e X-MS-TrafficTypeDiagnostic: CY4PR12MB1430:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: fqK3sH0D+fNuTh552VcqBPKC410Q8Q8Zocw+pbR3vPtB102wSVo4qW377NkS4BiUk1NUNhelqUZcECULgZuzAYijLI75nMv+/UAXrT6EdtPNUz0UGmtvTzFASEIMm8ZvQZVrJcUyBCH6G9tVtkhSibKus0Iyuyaz8CczLny8JzecTOaVC9ubQq7qeruv8dJVkEwMnCN+fXPehZ36DR9PoLOucSiPg9PxsmEuTRQDN0Na4wRZg0nFDIQ5mhxGY+mZX0ztqz3i2/ITbopog/TVLghMbz1NIXXw+x8XOZfE7AAaDVj9B4YmrNECbOnSNPE68T2EGZ0FCqzpGVnCL28f4U/7csTH6iGL/1lXC9cmMlaMSrkUEtweou5LtGujuoaXXQnulZhq/hx0108aGfkVdLUEa/qNjbcuG2GFhKMdBw03oEsoW/3toKCXbbNpmtfc5BYStlaCfO6KuFXpzomzlFHRS9RJ2zq0LFHTFtNSwnwyae+ZL3lolVOnhqkUySvazEN72I8A4n5/UTRy2GYYCbT8hHSrNB4UcWeE/XruPnyeaIEHjArLDjjy+oJBLbq2NBs4P1zb8URvAfaTKFD02qaXGTQoq4jC0r+QAvzwCxT5Gj00q96WZEbSTBqiMqg1HbN0iqf4ae3dzCiW37zXSQNbuk9m8oaCl2KOFJwjZF11/CME2O1fvX3ty/9KS/jrUGkFty4PYxrYBC3AVYM06+XExu5AGyqpxxsH1rXIBQkWoKzHcFpGAxejnds/zLCA X-Forefront-Antispam-Report: CIP:12.22.5.235;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:mail.nvidia.com;PTR:InfoNoRecords;CAT:NONE;SFS:(13230001)(4636009)(36840700001)(46966006)(40470700004)(86362001)(83380400001)(54906003)(110136005)(16576012)(36756003)(40460700003)(2906002)(316002)(508600001)(31696002)(8676002)(81166007)(356005)(4326008)(36860700001)(70206006)(47076005)(70586007)(8936002)(5660300002)(16526019)(186003)(26005)(426003)(336012)(82310400005)(31686004)(2616005)(36900700001)(43740500002);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Apr 2022 14:04:01.0554 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ecd38037-4545-4967-c3be-08da1bc4213e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.235];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT057.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR12MB1430 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org > diff --git a/drivers/pci/p2pdma.c b/drivers/pci/p2pdma.c > index 30b1df3c9d2f..187047be83a0 100644 > --- a/drivers/pci/p2pdma.c > +++ b/drivers/pci/p2pdma.c > @@ -327,15 +327,19 @@ static const struct pci_p2pdma_whitelist_entry { > > /* > * This lookup function tries to find the PCI device corresponding to a given > - * host bridge. > + * host bridge or a root port. > * > * It assumes the host bridge device is the first PCI device in the > - * bus->devices list and that the devfn is 00.0. These assumptions should hold > - * for all the devices in the whitelist above. > + * bus->devices list and that the devfn is 00.0. The first assumption should > + * hold for all the devices in the whitelist above, however the second > + * assumption doesn't always hold for root ports. > + * For example for Intel Skylake devices 2030, 2031, 2032 and 2033, > + * which are root ports (A, B, C and D respectively). > + * So the function checks explicitly that the device is a root port. > * > - * This function is equivalent to pci_get_slot(host->bus, 0), however it does > - * not take the pci_bus_sem lock seeing __host_bridge_whitelist() must not > - * sleep. > + * This function is equivalent to pci_get_slot(host->bus, 0) (except for > + * the root port test), however it does not take the pci_bus_sem lock seeing > + * __host_bridge_whitelist() must not sleep. > * > * For this to be safe, the caller should hold a reference to a device on the > * bridge, which should ensure the host_bridge device will not be freed > @@ -350,10 +354,19 @@ static struct pci_dev *pci_host_bridge_dev(struct pci_host_bridge *host) > > if (!root) > return NULL; > - if (root->devfn != PCI_DEVFN(0, 0)) > - return NULL; > > - return root; > + /* Verify that the device is a host bridge or a root port > + * It is assumed that host bridges have a 0 devfn, (common practice) > + * but some of the entries in the whitelist are root ports that can > + * have any devfn > + */ > + if (root->devfn == PCI_DEVFN(0, 0)) > + return root; > + > + if (pci_pcie_type(root) == PCI_EXP_TYPE_ROOT_PORT) > + return root; > + > + return NULL; > } > > static bool __host_bridge_whitelist(struct pci_host_bridge *host, Thanks, it also helped our system. Tested-by: Maor Gottlieb