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From: Krishna Chaitanya Chundru <quic_krichai@quicinc.com>
To: Richard Zhu <hongxing.zhu@nxp.com>, <jingoohan1@gmail.com>,
	<bhelgaas@google.com>, <lpieralisi@kernel.org>, <kw@linux.com>,
	<manivannan.sadhasivam@linaro.org>, <robh@kernel.org>,
	<frank.li@nxp.com>
Cc: <imx@lists.linux.dev>, <kernel@pengutronix.de>,
	<linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v1] PCI: dwc: Clean up some unnecessary codes in dw_pcie_suspend_noirq()
Date: Thu, 7 Nov 2024 15:39:33 +0530	[thread overview]
Message-ID: <94ed3622-a46e-a593-43f1-4ed7b0eba10a@quicinc.com> (raw)
In-Reply-To: <20241107084455.3623576-1-hongxing.zhu@nxp.com>



On 11/7/2024 2:14 PM, Richard Zhu wrote:
> Before sending PME_TURN_OFF, don't test the LTSSM stat. Since it's safe
> to send PME_TURN_OFF message regardless of whether the link is up or
> down. So, there would be no need to test the LTSSM stat before sending
> PME_TURN_OFF message.
> 
> Remove the L2 poll too, after the PME_TURN_OFF message is sent out.
> Because the re-initialization would be done in dw_pcie_resume_noirq().
>
we should not remove the poll here, it is required for the endpoint
to go gracefully in to L2. Some endpoints can have some cleanups needs
to be done before entering into L2 or L3. For the PME turnoff message,
the endpoints needs to send L23 ack which indicates endpoint is
ready to L2 without that it will not be gracefull D3cold sequence.

-Krishna Chaitanya.

> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
>   .../pci/controller/dwc/pcie-designware-host.c | 20 ++++---------------
>   1 file changed, 4 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index f86347452026..64c49adf81d2 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -917,7 +917,6 @@ static int dw_pcie_pme_turn_off(struct dw_pcie *pci)
>   int dw_pcie_suspend_noirq(struct dw_pcie *pci)
>   {
>   	u8 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
> -	u32 val;
>   	int ret = 0;
>   
>   	/*
> @@ -927,23 +926,12 @@ int dw_pcie_suspend_noirq(struct dw_pcie *pci)
>   	if (dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKCTL) & PCI_EXP_LNKCTL_ASPM_L1)
>   		return 0;
>   
> -	/* Only send out PME_TURN_OFF when PCIE link is up */
> -	if (dw_pcie_get_ltssm(pci) > DW_PCIE_LTSSM_DETECT_ACT) {
> -		if (pci->pp.ops->pme_turn_off)
> -			pci->pp.ops->pme_turn_off(&pci->pp);
> -		else
> -			ret = dw_pcie_pme_turn_off(pci);
> -
> +	if (pci->pp.ops->pme_turn_off) {
> +		pci->pp.ops->pme_turn_off(&pci->pp);
> +	} else {
> +		ret = dw_pcie_pme_turn_off(pci);
>   		if (ret)
>   			return ret;
> -
> -		ret = read_poll_timeout(dw_pcie_get_ltssm, val, val == DW_PCIE_LTSSM_L2_IDLE,
> -					PCIE_PME_TO_L2_TIMEOUT_US/10,
> -					PCIE_PME_TO_L2_TIMEOUT_US, false, pci);
> -		if (ret) {
> -			dev_err(pci->dev, "Timeout waiting for L2 entry! LTSSM: 0x%x\n", val);
> -			return ret; > -		}>   	}
>   
>   	dw_pcie_stop_link(pci);

  reply	other threads:[~2024-11-07 10:10 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-07  8:44 [PATCH v1] PCI: dwc: Clean up some unnecessary codes in dw_pcie_suspend_noirq() Richard Zhu
2024-11-07 10:09 ` Krishna Chaitanya Chundru [this message]
2024-11-07 11:13 ` Manivannan Sadhasivam
2024-11-07 16:08   ` Frank Li
2024-11-07 16:30     ` Manivannan Sadhasivam
2024-11-08  0:24   ` Bjorn Helgaas
2024-11-10  0:10     ` Krishna Chaitanya Chundru
2024-11-11  3:29       ` Hongxing Zhu
2024-11-11  5:33         ` Manivannan Sadhasivam
2024-11-11 16:18           ` Frank Li
2024-11-12  9:00             ` Hongxing Zhu
2024-11-11  6:09     ` Manivannan Sadhasivam
2024-11-11 17:42       ` Frank Li
2024-11-12  8:02         ` Manivannan Sadhasivam
2024-11-12  9:15           ` Hongxing Zhu
2024-11-12 16:30             ` Frank Li
2024-11-12  9:25       ` Hongxing Zhu
2024-11-12 18:04         ` Manivannan Sadhasivam

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