From: Sinan Kaya <okaya@kernel.org>
To: adanaila@ctrlinux.com, linux-pci@vger.kernel.org
Subject: Re: Sharing PCIe MMIO with other Drivers
Date: Fri, 9 Nov 2018 16:32:36 -0800 [thread overview]
Message-ID: <9d6840e2-1f36-619c-33fc-7872a072e12d@kernel.org> (raw)
In-Reply-To: <1541809334.2290928.1571950584.2632F1FD@webmail.messagingengine.com>
On 11/9/2018 4:22 PM, Andrei Danaila wrote:
> A couple of questions:
>
> 1. Is this the correct software flow for managing multiple devices exposed by a PCIe BAR0 address space?
> If not, what is the correct flow?
> If yes, any ideas on what may be going wrong?
General practice is to create a PCI Physical Function for each sub-functionality
(I2C/UART/DMA etc.) so that individual drivers can claim their own PCI device
and its own BAR space without sharing resources.
next prev parent reply other threads:[~2018-11-10 0:32 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-10 0:22 Sharing PCIe MMIO with other Drivers Andrei Danaila
2018-11-10 0:32 ` Sinan Kaya [this message]
2018-11-10 0:43 ` Andrei Danaila
2018-11-10 0:48 ` Sinan Kaya
2018-11-10 0:57 ` Andrei Danaila
2018-11-10 1:02 ` Sinan Kaya
2018-11-12 2:26 ` Oliver O'Halloran
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