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Date: Fri, 4 Sep 2015 16:53:48 -0700
Message-ID: <CAE9FiQVB0swnTao3eS1kOLvwU-hm0aEpOTXP7wDKFGqtLQta5g@mail.gmail.com>
Subject: Re: trouble with PCI: Call pci_read_bridge_bases() from core instead
 of arch code
From: Yinghai Lu <yinghai@kernel.org>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	"oe5hpm@gmail.com" <oe5hpm@gmail.com>,
	Ralf Baechle <ralf@linux-mips.org>,
	"James E.J. Bottomley" <jejb@parisc-linux.org>,
	Michael Ellerman <mpe@ellerman.id.au>,
	Richard Henderson <rth@twiddle.net>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	David Howells <dhowells@redhat.com>,
	Russell King <linux@arm.linux.org.uk>,
	Tony Luck <tony.luck@intel.com>,
	"David S. Miller" <davem@davemloft.net>,
	Ingo Molnar <mingo@redhat.com>,
	Guenter Roeck <linux@roeck-us.net>,
	Michal Simek <monstr@monstr.eu>,
	Chris Zankel <chris@zankel.net>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>
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On Fri, Sep 4, 2015 at 9:44 AM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
> On Fri, Sep 04, 2015 at 05:00:35PM +0100, Yinghai Lu wrote:
>
> The problem here is not the last retry, it is the first bridge scan.
>
> By moving pci_read_bridge_bases() to core PCI code, if we do not
> vet the bridge apertures (ie claim them and reset them if the claiming
> fails) we end up calling (on ARM) __pci_bus_size_bridges() with apertures
> that can have sizes != 0, which does not make any sense since we are calling
> __pci_bus_size_bridges() to *discover* what the aperture size should
> be on first bridge scan, correct ?

for x86, in pcibios_allocate_bridge_resources(), we do validate
the bridge resources, and reset size to 1 (strange ?!).
and they are called before pci_asssign_unassigned_resources()

so arch ARM would support pcibios_allocate_bridge_resources or other
call to do the same thing?

wonder some arches even claim fails, they still does not want you to
reset it.

Thanks

Yinghai