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From: Bjorn Helgaas <bhelgaas@google.com>
To: Jayachandran C <jnair@caviumnetworks.com>
Cc: Bjorn Helgaas <helgaas@kernel.org>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	Joerg Roedel <joro@8bytes.org>,
	"open list:INTEL IOMMU (VT-d)" <iommu@lists.linux-foundation.org>,
	Jon Masters <jcm@redhat.com>, Robin Murphy <robin.murphy@arm.com>,
	linux-arm <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v5 2/2] PCI: quirks: Fix ThunderX2 dma alias handling
Date: Tue, 25 Apr 2017 08:37:21 -0500	[thread overview]
Message-ID: <CAErSpo4vyyocOUCVa9c7o4psLHdmUTnaKoOtjW5_oSyW=YKeGw@mail.gmail.com> (raw)
In-Reply-To: <20170425130346.GA30542@localhost>

On Tue, Apr 25, 2017 at 8:03 AM, Jayachandran C
<jnair@caviumnetworks.com> wrote:
> On Fri, Apr 21, 2017 at 12:57:05PM -0500, Bjorn Helgaas wrote:

>> I did notice that all the Root Port devices claim to *not* be connected to
>> slots, which doesn't seem right.  For example,
>>
>>   12:00.0 PCI bridge: Broadcom Corporation Device 9084
>>       Bus: primary=12, secondary=13, subordinate=14, sec-latency=0
>>       Capabilities: [ac] Express (v2) Root Port (Slot-), MSI 00
>>
>>   13:00.0 Ethernet controller: Intel Corporation 82599EB 10-Gigabit SFI/SFP+ Network Connection
>>
>> It seems strange because the 12:00.0 Root Port looks like it probably
>> *does* lead to a slot where the NIC is plugged in.  Or is that NIC really
>> soldered down?
>>
>> But I assume there are *some* PCIe slots, so at some of those Root Ports
>> should advertise "Slot+" (which by itself does not imply hotplug support,
>> if that's the concern).
>
> The Root Ports are connected to a slot, so I am not sure why the slot implemented
> bit is not set. There seems to be nothing useful in the slot capabilites, so this
> may be ok for now. I have reported this to the hardware team.

Thanks.  The "Slot Implemented" bit and the slot registers aren't
essential if you don't want to support hotplug on those slots.  But
even without hotplug, they do contain things like a slot number, which
may be useful in the user interface.

  reply	other threads:[~2017-04-25 13:37 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-13 20:30 [PATCH v5 0/2] Handle Cavium ThunderX2 PCI topology quirk Jayachandran C
2017-04-13 20:30 ` [PATCH v5 1/2] PCI: Add device flag PCI_DEV_FLAGS_BRIDGE_XLATE_ROOT Jayachandran C
2017-04-13 20:30 ` [PATCH v5 2/2] PCI: quirks: Fix ThunderX2 dma alias handling Jayachandran C
2017-04-14  0:19   ` Bjorn Helgaas
2017-04-14 21:06     ` Jayachandran C
2017-04-15  2:00       ` Bjorn Helgaas
2017-04-17 17:47         ` Jayachandran C
2017-04-17 19:51           ` Bjorn Helgaas
2017-04-21 15:48           ` Bjorn Helgaas
2017-04-21 17:05             ` Jayachandran C
2017-04-21 17:57               ` Bjorn Helgaas
2017-04-25 13:03                 ` Jayachandran C
2017-04-25 13:37                   ` Bjorn Helgaas [this message]
2017-04-19 23:38     ` Jon Masters
2017-04-20  0:25       ` Jon Masters
2017-04-20 13:20         ` Bjorn Helgaas
2017-04-20 15:12           ` Jon Masters

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