linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Bjorn Helgaas <bhelgaas@google.com>
To: Yinghai Lu <yinghai@kernel.org>
Cc: "Jesse Barnes" <jbarnes@virtuousgeek.org>,
	"Ram Pai" <linuxram@us.ibm.com>,
	"Dominik Brodowski" <linux@dominikbrodowski.net>,
	"Linus Torvalds" <torvalds@linux-foundation.org>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	"Rogério Brito" <rbrito@ime.usp.br>
Subject: Re: [PATCH 3/9] PCI: Disable cardbus bridge MEM1 pref CTL
Date: Fri, 10 Feb 2012 14:11:58 -0800	[thread overview]
Message-ID: <CAErSpo7oxTDdB3CJZuG+=xsZanOc76xdnMYDPsfaP-CSsmGxiQ@mail.gmail.com> (raw)
In-Reply-To: <CAE9FiQXeNGP3zj2PhWK_Gcnwr9Qsn6LZ74TL2OA2RrztLaewvg@mail.gmail.com>

On Fri, Feb 10, 2012 at 12:54 PM, Yinghai Lu <yinghai@kernel.org> wrote:
> On Fri, Feb 10, 2012 at 12:46 PM, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
>> On Sat,  4 Feb 2012 22:55:02 -0800
>> Yinghai Lu <yinghai@kernel.org> wrote:
>>
>>> Some BIOS enable both pref for MEM0 and MEM1.
>>>
>>> but we assume MEM1 is non-pref...
>>>
>>> Signed-off-by: Yinghai Lu <yinghai@kernel.org>
>>> ---
>>>  drivers/pci/setup-bus.c |    8 ++++++++
>>>  1 files changed, 8 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
>>> index 090217a..d5897c3 100644
>>> --- a/drivers/pci/setup-bus.c
>>> +++ b/drivers/pci/setup-bus.c
>>> @@ -914,6 +914,14 @@ static void pci_bus_size_cardbus(struct pci_bus *bus,
>>>       if (realloc_head)
>>>               add_to_list(realloc_head, bridge, b_res+1, pci_cardbus_io_size, 0 /* dont care */);
>>>
>>> +     /* MEM1 must not be pref mmio */
>>> +     pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
>>> +     if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM1) {
>>> +             ctrl &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM1;
>>> +             pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl);
>>> +             pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
>>> +     }
>>> +
>>>       /*
>>>        * Check whether prefetchable memory is supported
>>>        * by this bridge.
>>
>> Does this actually fix any bugs?
>
> at least, one of laptop have this problem.

Rogério Brito's Clevo M5X0JE laptop seems to boot with both CardBus
mem apertures set to prefetchable.  I think there's evidence of this
in one of the video boot logs Rogério mentioned in this thread:
https://lkml.org/lkml/2012/1/6/343 because I noticed the same thing
and fixed a nearby bug in lspci.

I looked for it, but didn't find it.  I think it would be useful if
Yinghai could locate it, transcribe it into a bugzilla report, and
mention the bugzilla URL in this commit log.

I think Rogério did try the patch, but I don't know whether he
observed different behavior.  I think it *does* fix a bug; it's just
that his box has more serious problems that we haven't figured out
yet.

Bjorn

  reply	other threads:[~2012-02-10 22:12 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-02-05  6:54 [PATCH -v2 0/9] PCI : bridge resource reallocation patchset -- followup Yinghai Lu
2012-02-05  6:55 ` [PATCH 1/9] pci: Fix pci cardbus removal Yinghai Lu
2012-02-10 20:20   ` Jesse Barnes
2012-02-05  6:55 ` [PATCH 2/9] PCI: Fix /sys warning when sriov enabled card is hot removed Yinghai Lu
2012-02-10 20:39   ` Jesse Barnes
2012-02-05  6:55 ` [PATCH 3/9] PCI: Disable cardbus bridge MEM1 pref CTL Yinghai Lu
2012-02-10 20:46   ` Jesse Barnes
2012-02-10 20:54     ` Yinghai Lu
2012-02-10 22:11       ` Bjorn Helgaas [this message]
2012-02-05  6:55 ` [PATCH 4/9] PCI: Fix cardbus bridge resources as optional size handling Yinghai Lu
2012-02-08  4:35   ` Ram Pai
2012-02-08  4:48     ` Yinghai Lu
2012-02-08  5:01       ` Ram Pai
2012-02-08  6:11         ` Yinghai Lu
2012-02-10 20:52           ` Jesse Barnes
2012-02-10 20:56             ` Yinghai Lu
2012-02-05  6:55 ` [PATCH 5/9] PCI: Skip reset cardbus assigned resource during pci bus rescan Yinghai Lu
2012-02-05  6:55 ` [PATCH 6/9] PCI: Retry on type IORESOURCE_IO allocation Yinghai Lu
2012-02-05  6:55 ` [PATCH 7/9] PCI: Make pci bridge reallocating enabled/disabled Yinghai Lu
2012-02-10 20:56   ` Jesse Barnes
2012-02-05  6:55 ` [PATCH 8/9] PCI: print out suggestion about using pci=realloc Yinghai Lu
2012-02-10 20:59   ` Jesse Barnes
2012-02-05  6:55 ` [PATCH 9/9] PCI: only enable pci realloc when SRIOV bar is not assigned Yinghai Lu
2012-02-10 21:00   ` Jesse Barnes
2012-02-10 21:23     ` Yinghai Lu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to='CAErSpo7oxTDdB3CJZuG+=xsZanOc76xdnMYDPsfaP-CSsmGxiQ@mail.gmail.com' \
    --to=bhelgaas@google.com \
    --cc=jbarnes@virtuousgeek.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux@dominikbrodowski.net \
    --cc=linuxram@us.ibm.com \
    --cc=rbrito@ime.usp.br \
    --cc=torvalds@linux-foundation.org \
    --cc=yinghai@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).