From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9415723A9BF; Mon, 14 Jul 2025 09:36:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752485795; cv=none; b=EhehirnqSWkaxZ+FteYIQbvA8hYBc1hsV/9oRZ2qED+7ejSoLn9HpOWVc3syVK7JUWKcyZaWgrvLP2hB4iZzi+mc2/7f+Hwnm4/kb29cjWjfd7ygzIk2/t7XeCnpUV2XhB9AnBsWXEzidwURFMWjfVRTdSZ7N+Lhbx8xbnuEfOM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752485795; c=relaxed/simple; bh=Vzxq/edcrTJeXzQiDeTB7+LshkLJsBhp6E8UKnKvfSM=; h=Mime-Version:Content-Type:Date:Message-Id:Cc:To:From:Subject: References:In-Reply-To; b=aST13iuBOswOUxZZjucu20RVPqIgDxsy/qEmoULYqCR0GGpKJhI+ob+q5lKIa1j9ZPMvFy79JpHIn5X+jLe2uBJzt2lLXl4opls3mlMhs4y0z1zTaKk7QQ0lli0xx0iUZv9E3Y7TUc/YBMGi5QvA+HYUBOvnp+1QqhCpxjyWjfM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=OEUGd856; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="OEUGd856" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 990D1C4CEED; Mon, 14 Jul 2025 09:36:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1752485795; bh=Vzxq/edcrTJeXzQiDeTB7+LshkLJsBhp6E8UKnKvfSM=; h=Date:Cc:To:From:Subject:References:In-Reply-To:From; b=OEUGd856MPfzTVt06by6WFNAR4j7ZTfCOc3jSN3pFPIBGbLKkYeX4oz0TR/4rFjCz V091A06vmH7yuTIszh/AVdwo3exBgjAkqNFtdXsVcgLBSFxeN080BMH9NA3NPFnGdn xr3guGW5KVvlqss1gy609IiYHVyoE4IA1mBm4Nn5zHhhvl4/+ILB/UiOmVmYaiPVxJ bRv6gDACgIU3MHE7+5fv59w8i2PDkQjB9mhwrbUxngbI8eoOFicCcgffRZBXMNrwuz 8LqZAtvy0vbLBvGOWWyX5UuWMATVp3kjbqNUEl8lSsq0fXkh616x2/A+27ItsJqwAu dSrkF/V6m+y9A== Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Mon, 14 Jul 2025 11:36:29 +0200 Message-Id: Cc: "Daniel Almeida" , "Benno Lossin" , "Miguel Ojeda" , "Alex Gaynor" , "Boqun Feng" , "Gary Guo" , =?utf-8?q?Bj=C3=B6rn_Roy_Baron?= , "Andreas Hindborg" , "Alice Ryhl" , "Trevor Gross" , "Greg Kroah-Hartman" , "Rafael J. Wysocki" , "Thomas Gleixner" , "Bjorn Helgaas" , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , , , To: "Dirk Behme" From: "Danilo Krummrich" Subject: Re: [PATCH v6 3/6] rust: irq: add support for non-threaded IRQs and handlers References: <20250703-topics-tyr-request_irq-v6-0-74103bdc7c52@collabora.com> <20250703-topics-tyr-request_irq-v6-3-74103bdc7c52@collabora.com> In-Reply-To: On Mon Jul 14, 2025 at 9:57 AM CEST, Dirk Behme wrote: > On 13/07/2025 16:19, Danilo Krummrich wrote: >> On Sun Jul 13, 2025 at 4:09 PM CEST, Daniel Almeida wrote: >>> On a second look, I wonder how useful this will be. >>> >>> fn handle(&self, dev: &Device) -> IrqReturn >>> >>> Sorry for borrowing this terminology, but here we offer Device, = while I >>> suspect that most drivers will be looking for the most derived Device t= ype >>> instead. So for drm drivers this will be drm::Device, for example, not = the base >>> dev::Device type. I assume that this pattern will hold for other subsys= tems as >>> well. >>> >>> Which brings me to my second point: drivers can store an ARef on >>> the handler itself, and I assume that the same will be possible in othe= r >>> subsystems. >>=20 >> Well, the whole point is that you can use a &Device to directly a= ccess >> device resources without any overhead, i.e. >>=20 >> fn handle(&self, dev: &Device) -> IrqReturn { >> let io =3D self.iomem.access(dev); >>=20 >> io.write32(...); > > As this is exactly the example I was discussing privately with Daniel > (many thanks!), independent on the device discussion here, just for my > understanding: > > Is it ok to do a 'self.iomem.access(dev)' at each interrupt? Absolutely, Devres::access() is a very cheap accessor, see also [1]. Compil= ed down, the only thing that Revocable::access() does is deriving a pointer fr= om another pointer by adding an offset. That's exactly why we want the &Device cookie, to avoid more expensi= ve operations. [1] https://rust.docs.kernel.org/src/kernel/revocable.rs.html#151 > Wouldn't it > be cheaper/faster to pass 'io' instead of 'iomem' to the interrupt handle= r? Well, consider the types of the example: iomem: Devres> io: &IoMem You can't store a reference with a non-static lifetime in something with an open-ended lifetime, such as the Handler object. How would you ensure that the reference is still valid? The Devres> object might have been dropped already, either by the user or by Devres rev= oking the inner object due to device unbind.